HSDL-3220
IrDA
®
Data Compliant Low Power 4.0 Mbit/s
Infrared Transceiver
Data Sheet
Description
The HSDL-3220 is a new generation low profile high
speed infrared transceiver module that provides
interface between logic and IR signals for through-
air, serial, half-duplex IR data-link. The module is fully
compliant to IrDA Physical Layer specification
version 1.4 low power from 9.6kbit/s to 4.0 Mbit/s
(FIR) and is IEC825-Class 1 Eye Safe.
The HSDL-3220 can be shutdown completely to
achieve very low power consumption. In the shutdown
mode, the PIN diode will be inactive and thus pro-
ducing very little photocurrent even under very bright
ambient light. It is also designed to interface to input/
output logic circuits as low as 1.8V. These features
are ideal for mobile devices that require low power
consumption.
V
CC
CX4
CX1
IOV
CC
(7)
V
CC
(6)
GND (8)
CX2
Features
• Fully compliant to IrDA 1.4 physical layer low power specification
from 9.6 kbit/s to 4.0 Mbit/s (FIR)
• Miniature package
– Height: 2.5 mm
– Width: 8.0 mm
– Depth: 3.0 mm
• Typical link distance > 50 cm
• Guaranteed temperature performance,
-25
o
to 70
o
C
• Critical parameters are guaranteed over temperature and supply
voltage
• Low power consumption
– Low shutdown current
– Complete shutdown of TXD, RXD, and PIN diode
• Excellent EMI performance
• Vcc supply 2.7 to 3.6 Volts
• Interfacing with I/O logic circuits as low as 1.8 V
• Lead-free package
• LED stuck-high protection
• Designed to accommodate light loss with cosmetic windows
•
IEC 825-class 1 eye safe
•
Lead-free and RoHS Compliant
HSDL-3220
SD (5)
RECEIVER
RXD (4)
Applications
• Mobile telecom
– Mobile phones
– Smart phones
– Pagers
• Data communication
– Pocket PC handheld products
– Personal digital assistants
– Portable printers
• Digital imaging
– Digital cameras
– Photo-imaging printers
• Electronic wallet
• Small industrial & medical instrumentation
– General data collection devices
– Patient & pharmaceutical data collection devices
SHIELD
TXD (3)
LED C (2)
TRANSMITTER
R1
V
led
LED A (1)
CX3
Figure 1. Functional block diagram of HSDL-3220.
8
7
6
5
4
3
2
1
Figure 2. Rear view diagram with pinout.
Application Support Information
The Application Engineering
Group is available to assist you
with the application design
Order Information
Part Number
HSDL-3220-021
HSDL-3220-001
associated with the HSDL-3220
infrared transceiver module. You
can contact them through your
local sales representatives for
additional details.
Marking Information
The unit is marked with the
letter “G” and “YWWLL” on the
shield where:
Y is the last digit of the year
WW is the work week
LL is the lot information
Packaging Type
Tape and Reel
Tape and Reel
Package
Front View
Front View
Quantity
2500
500
I/O Pins Configuration Table
Pin
1
2
3
4
5
6
7
8
-
Symbol
LED A
LED C
TXD
RXD
SD
Vcc
IOVcc
GND
Shield
Description
LED Anode
LED Cathode
Transmit Data. Active High.
Receive Data. Active Low.
Shutdown. Active High.
Supply Voltage
Input/Output ASIC Vcc
Ground
EMI Shield
I/O Type
I
Notes
1
2
I
O
I
3
4
5
6
7
8
9
Recommended Application Circuit Components
Component
R1
Recommended Value
5.6Ω
±
5%, 0.25 watt for 2.7
≤
Vled < 3.3V
10Ω
±
5%, 0.25 watt for 3.3
≤
Vled < 4.2V
15Ω
±
5%, 0.25 watt for 4.2
≤
Vled < 5.5V
0.47
µF ±
20%, X7R Ceramic
6.8
µF ±
20%, Tantalum
Notes
CX1, CX4
CX2, CX3
10
11
Notes:
1. Tied through external series resistor, R1, to regulated Vled from 2.7 to 5.5V. Please refer to table
above for recommended series resistor value.
2. Internally connected to LED driver. Leave this pin unconnected.
3. This pin is used to transmit serial data when SD pin is low. If this pin is held high for longer than
50
µs,
the LED is turned off. Do NOT float this pin.
4. This pin is capable of driving a standard CMOS or TTL load. No external pull-up or pull-down
resistor is required. The pin is in tri-state when the transceiver is in shutdown mode. The receiver
output echoes transmitted signal.
5. The transceiver is in shutdown mode if this pin is high for more than 400
µs.
On falling edge of
this signal, the state of the TXD pin sampled and used to set receiver low bandwidth (TXD=low)
or high bandwidth (TXD=high) mode. Refer to the section ”Bandwidth selection timing” for
programming information. Do NOT float this pin.
6. Regulated, 2.7 to 3.6 Volts.
7. Connect to ASIC logic controller Vcc voltage or supply voltage. The voltage at this pin must be
equal to or less than supply voltage.
8. Connect to system ground.
9. Connect to system ground via a low inductance trace. For best performance, do not connect
directly to the transceiver pin GND.
10. CX1 must be placed within 0.7 cm of the HSDL-3220 to obtain optimum noise immunity.
11. In environments with noisy power supplies, including CX2, as shown in Figure 1, can enhance
supply ripple rejection performance.
2
Bandwidth Selection Timing
The transceiver is in default SIR/
MIR mode when powered on.
User needs to apply the following
programming sequence to both
the SD and TXD inputs to enable
the transceiver to operate at FIR
mode.
V
IH
SD/MODE
V
IL
t
S
t
H
V
IH
SD/MODE
50%
50%
V
IL
t
S
t
H
V
IH
TXD
50%
50%
V
IL
TXD
50%
50%
V
IL
Figure 3. Bandwidth selection timing at SIR/MIR mode.
Figure 4. Bandwidth selection timing at FIR mode.
Setting the transceiver to SIR/MIR
Mode (9.6 kbit/s to 1.152 Mbit/s)
1. Set SD/Mode input to logic
HIGH
2. TXD input should remain at
logic LOW
3. After waiting for t
S
≥
25 ns, set
SD/Mode to logic LOW, the
HIGH to LOW negative edge
transition will determine the
receiver bandwidth
4. Ensure that TXD input re-
mains low for t
H
≥
100 ns, the
receiver is now in SIR/MIR
mode
5. SD input pulse width for mode
selection should be > 50 ns.
Setting the transceiver to FIR
(4.0 Mbit/s) Mode
1. Set SD/Mode input to logic
HIGH
2. After SD/Mode input remains
HIGH at > 25 ns, set TXD input
to logic HIGH, wait t
S
≥
25 ns
(from 50% of TXD rising edge
till 50% of SD falling edge)
3. Then set SD/Mode to logic
LOW, the HIGH to LOW
negative edge transition will
determine the receiver band-
width
4. After waiting for t
H
≥
100 ns,
set the TXD input to logic LOW
5. SD input pulse width mode
selection should be > 50 ns.
Transceiver I/O Truth Table
Inputs
TXD
High
Low
Low
Don’t Care
Outputs
SD
Low
Low
Low
High
Light Input to Receiver
Don’t Care
High
Low
Don’t Care
LED
On
Off
Off
Off
RXD
Not Valid
Low
High
High
Note
12,13
Notes:
12. In-band IrDA signals and data rates
≤
4.0 Mbit/s
13. RXD logic low is a pulsed response. The condition is maintained for a duration dependent on pattern and strength of the incident intensity.
3
CAUTIONS:
The BiCMOS inherent to the design of this component increases the component’s
susceptibility to damage from electrostatic discharge (ESD). It is advised that normal static precautions
be taken in handling and assembly of this component to prevent damage and/or degradation which may
be induced by ESD.
Absolute Maximum Ratings
For implementations where case to ambient thermal resistance is
≤
50°C/W.
Parameter
S
torage Temperature
Symbol
T
S
T
A
V
LEDA
V
CC
V
I
V
O
I
LED
(DC)
I
LED
(PK)
Min.
-40
-25
0
0
0
0
Max.
+100
+70
6.5
6.5
6.5
6.5
50
200
Units
°C
°C
V
V
V
V
mA
mA
Conditions
Operating Temperature
LED Anode Voltage
Supply Voltage
Input Voltage: TXD, SD/Mode
Output Voltage: RXD
DC LED Transmit Current
Average Transmit Current
≤
90
µs
pulse width
≤
25% duty cycle
Recommended Operating Conditions
Parameter
Supply Voltage
Input/Output Voltage
Logic Input Voltage
for TXD, SD/Mode
Logic High
Logic Low
Logic High
Receiver Input Irradiance
E
IH, max
Logic Low
LED (Logic High) Current
Pulse Amplitude
Receiver Data Rate
E
IL
I
LEDA
0.0096
150
4.0
Symbol
V
CC
IOVcc
V
IH
V
IL
E
IH, min
Min.
2.7
1.8
IOV
cc
– 0.5
0
Typ.
Max.
3.6
Vcc
IOV
cc
0.4
0.0081
0.020
500
0.3
Units
V
V
V
V
mW/cm
2
mW/cm
2
mW/cm
2
µW/cm
2
mA
Mbit/s
Conditions
9.6kbit/s
≤
in-band signals
≤1.152
Mbit/s
[14]
1.152 Mbit/s < in-band signals
≤
4.0 Mbit/s
[14]
9.6 kbit/s
≤
in-band signals
≤
4.0 Mbit/s
[14]
For in-band signals
[14]
Note :
14. An in-band optical signal is a pulse/sequence where the peak wavelength,
λp,
is defined as 850
≤ λp ≤
900 nm, and the pulse characteristics are
compliant with the IrDA Serial Infrared Physical Layer Link Specification v1.4.
4
Electrical and Optical Specifications
Specifications (Min. and Max. values) hold over the recommended operating conditions unless otherwise noted.
Unspecified test conditions may be anywhere in their operating range. All typical values (Typ.) are at 25°C, Vcc set to 3.0V
and IOVcc set to 1.8V unless otherwise noted.
Parameter
Receiver
Viewing Angle
Peak Sensitivity Wavelength
RXD Output Voltage
Logic High
Logic Low
RXD Pulse Width (SIR)
[15]
RXD Pulse Width (MIR)
[16]
RXD Pulse Width (FIR)
[16]
RXD Rise and Fall Times
Receiver Latency Time
[17]
Receiver Wake Up Time
[18]
Transmitter
Radiant Intensity
Viewing Angle
Peak Wavelength
Spectral Line Half Width
TXD Input Current
LED ON Current
TXD Pulse Width (SIR)
TXD Pulse Width (MIR)
TXD Pulse Width (FIR)
Maximum Optical PW
[19]
TXD Rise and fall Time (Optical)
LED Anode On-State Voltage
Transceiver
Supply Current
Shutdown
Idle
I
CC1
I
CC2
0.1
1.8
1
3.0
µA
mA
V
SD
≥
V
IH,
Ta= 25°C
V
SD
≤
V
IL
, V
TXD
≤
V
IL
, EI=0
High
Low
IE
H
2θ
λ
p
∆λ
I
H
I
L
I
LEDA
t
PW
(SIR)
t
PW
(MIR)
t
PW
(FIR)
t
PW(max.)
t
r
, t
f
V
ON(LEDA)
1.6
1.5
148
115
150
1.6
217
125
50
1.8
260
135
100
600
40
2.1
10
30
875
35
10
10
45
60
mW/sr
°
nm
nm
µA
µA
mA
µs
ns
ns
µs
ns
ns
V
t
PW
(TXD) = 1.4
µs
at 115.2 kbit/s
t
PW
(TXD) = 125 ns at 4.0 Mbit/s
I
LEDA
=150 mA, V
TXD
≥V
IH
V
TXD
≥
V
IH
0
≤
V
TXD
≤
V
IL
V
TXD
≥
V
IH
, R1=5.6ohm, Vled=3.0V
t
PW
(TXD) = 1.6
µs
at 115.2 kbit/s
t
PW
(TXD) = 217 ns at 1.152 Mbit/s
t
PW
(TXD)=125 ns at 4.0 Mbit/s
I
LEDA
= 150 mA,
θ ≤
15°, V
TXD
≥
V
IH
,
V
SD
≤
V
IL
, Ta=25°C
2θ
λp
V
OH
V
OL
t
PW
(SIR)
t
PW
(MIR)
t
PW
(FIR)
t
r
, t
f
t
L
t
W
IOV
CC
– 0.2
0
1
100
80
60
25
50
50
100
30
880
IOV
CC
0.4
4.0
500
175
°
nm
V
V
µs
ns
ns
ns
µs
µs
I
OH
= -200
µA,
EI
≤
0.3
µW/cm
2
I
OL
= 200
µA,
EI
≥
8.1
µW/cm
2
θ ≤
15°, C
L
= 9 pF
θ ≤
15°, C
L
= 9 pF
θ ≤
15°, C
L
= 9 pF
C
L
= 9 pF
Symbol
Min.
Typ.
Max.
Units
Conditions
Notes:
15. For in-band signals from 9.6 kbit/s to 115.2 kbit/s, where 9
µW/cm
2
≤
EI
≤
500 mW/cm
2
.
16. For in-band signals from 0.576 Mbit/s to 4.0 Mbit/s, where 22.5
µW/cm
2
≤
EI
≤
500 mW/cm
2
.
17. Latency time is defined as the time from the last TxD light output pulse until the receiver has recovered full sensitivity.
18. Receiver wake up time is measured from Vcc power on or SD pin high to low transition to a valid RXD output.
19. The maximum optical PW is the maximum time the LED remains on when the TXD is constantly high. This is to prevent long turn on time of the LED
for eye safety protection.
5
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