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74F827 • 74F828 10-Bit Buffers/Line Drivers
April 1988
Revised February 2004
74F827 • 74F828
10-Bit Buffers/Line Drivers
General Description
The 74F827 and 74F828 10-bit bus buffers provide high
performance bus interface buffering for wide data/address
paths or buses carrying parity. The 10-bit buffers have
NOR output enables for maximum control flexibility.
The 74F828 is an inverting version of the 74F827.
Features
s
3-STATE output
s
74F828 is inverting
Ordering Code:
Order Number
74F827SC
(Note 1)
74F827SPC
74F828SC
74F828SPC
(Note 1)
Package Number
M24B
N24C
M24B
N24C
Package Description
24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Note 1:
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagrams
74F827
74F828
© 2004 Fairchild Semiconductor Corporation
DS009598
www.fairchildsemi.com
74F827 • 74F828
Logic Symbols
74F827
74F828
IEEE/IEC
74F827
IEEE/IEC
74F828
Unit Loading/Fan Out
Pin Names
OE
1
, OE
2
D
0
–D
7
O
0
–O
7
Description
Output Enable Input
Data Inputs
Data Outputs, 3-STATE
U.L.
HIGH/LOW
1.0/1.0
1.0/1.0
600/106.6 (80)
Input I
IH
/I
IL
Output I
OH
/I
OL
20
µ
A/
−
0.6 mA
20
µ
A/
−
0.6 mA
−
12 mA/64 mA (48 mA)
Functional Description
The 74F827 and 74F828 are line drivers designed to be
employed as memory address drivers, clock drivers and
bus-oriented
transmitters/receivers
which
provide
improved PC board density. The devices have 3-STATE
outputs controlled by the Output Enable (OE) pins. The
outputs can sink 64 mA and source 15 mA. Input clamp
diodes limit high-speed termination effects.
Function Table
Inputs
OE
L
L
H
D
n
74F827
H
L
X
H
L
Z
Outputs
O
n
74F828
L
H
Z
Transparent
Transparent
High Z
Function
H
=
HIGH Voltage level
L
=
LOW Voltage Level
Z
=
High Impedance
X
=
Immaterial
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2
74F827 • 74F828
Logic Diagrams
74F827
74F828
Please note that these diagrams are provided only for the understanding of logic operations and should not be used to estimate propagation delays.
3
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74F827 • 74F828
Absolute Maximum Ratings
(Note 2)
Storage Temperature
Ambient Temperature under Bias
Junction Temperature under Bias
V
CC
Pin Potential to Ground Pin
Input Voltage (Note 3)
Input Current (Note 3)
Voltage Applied to Output
in HIGH State (with V
CC
=
0V)
Standard Output
3-STATE Output
Current Applied to Output
in LOW State (Max)
twice the rated I
OL
(mA)
−
65
°
C to
+
150
°
C
−
55
°
C to
+
125
°
C
−
55
°
C to
+
150
°
C
−
0.5V to
+
7.0V
−
0.5V to
+
7.0V
−
30 mA to
+
5.0 mA
Recommended Operating
Conditions
Free Air Ambient Temperature
Supply Voltage
0
°
C to
+
70
°
C
+
4.5V to
+
5.5V
−
0.5V to V
CC
−
0.5V to
+
5.5V
Note 2:
Absolute maximum ratings are values beyond which the device
may be damaged or have its useful life impaired. Functional operation
under these conditions is not implied.
Note 3:
Either voltage limit or current limit is sufficient to protect inputs.
DC Electrical Characteristics
Symbol
V
IH
V
IL
V
CD
V
OH
Parameter
Input HIGH Voltage
Input LOW Voltage
Input Clamp Diode Voltage
Output HIGH
Voltage
V
OL
I
IH
I
BVI
I
CEX
V
ID
I
OD
I
IL
I
OZH
I
OZL
I
OS
I
ZZ
I
CCH
I
CCL
I
CCZ
I
CCH
I
CCL
I
CCZ
Output LOW Voltage
Input HIGH
Current
Input HIGH Current
Breakdown Test
Output HIGH
Leakage Current
Input Leakage
Test
Output Leakage
Circuit Current
Input LOW Current
Output Leakage Current
Output Leakage Current
Output Short-Circuit Current
Bus Drainage Test
Power Supply Current (74F827)
Power Supply Current (74F827)
Power Supply Current (74F827)
Power Supply Current (74F828)
Power Supply Current (74F828)
Power Supply Current (74F828)
30
60
40
14
56
35
−100
4.75
3.75
−0.6
50
−50
−225
500
45
90
60
20
85
50
10% V
CC
10% V
CC
5% V
CC
10% V
CC
2.4
2.0
2.7
0.55
5.0
7.0
50
V
µA
µA
µA
V
µA
mA
µA
µA
mA
µA
mA
mA
mA
mA
mA
mA
Min
Max
Max
Max
0.0
0.0
Max
Max
Max
Max
0.0V
Max
Max
Max
Max
Max
Max
V
Min
Min
2.0
0.8
−1.2
Typ
Max
Units
V
V
V
Min
V
CC
Conditions
Recognized as a HIGH Signal
Recognized as a LOW Signal
I
IN
= −18
mA
I
OH
= −3
mA
I
OH
= −15
mA
I
OH
= −3
mA
I
OL
=
64 mA
V
IN
=
2.7V
V
IN
=
7.0V
V
OUT
=
V
CC
I
ID
=
1.9
µA
All Other Pins Grounded
V
IOD
=
150 mV
All Other Pins Grounded
V
IN
=
0.5V
V
OUT
=
2.7V
V
OUT
=
0.5V
V
OUT
=
0V
V
OUT
=
5.25V
V
O
=
HIGH
V
O
=
LOW
V
O
=
HIGH Z
V
O
=
HIGH
V
O
=
LOW
V
O
=
HIGH Z
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