Datasheet> 器件分类 > 存储> IDT71V3578S150PFGI8

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IDT71V3578S150PFGI8: 产品描述Cache SRAM, 256KX18, 3.8ns, CMOS, PQFP100, 14 X 20 MM, PLASTIC, TQFP-100; 产品类别存储; 文件大小496KB，共18页; 制造商IDT (Integrated Device Technology); 标准

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IDT71V3578S150PFGI8概述

Cache SRAM, 256KX18, 3.8ns, CMOS, PQFP100, 14 X 20 MM, PLASTIC, TQFP-100

IDT71V3578S150PFGI8规格参数

参数名称	属性值
是否无铅	不含铅
是否Rohs认证	符合
厂商名称	IDT (Integrated Device Technology)
零件包装代码	QFP
包装说明	LQFP, QFP100,.63X.87
针数	100
Reach Compliance Code	compliant
ECCN代码	3A991.B.2.A
最长访问时间	3.8 ns
其他特性	PIPELINED ARCHITECTURE
最大时钟频率 (fCLK)	150 MHz
I/O 类型	COMMON
JESD-30 代码	R-PQFP-G100
JESD-609代码	e3
长度	20 mm
内存密度	4718592 bit
内存集成电路类型	CACHE SRAM
内存宽度	18
湿度敏感等级	3
功能数量	1
端子数量	100
字数	262144 words
字数代码	256000
工作模式	SYNCHRONOUS
最高工作温度	85 °C
最低工作温度	-40 °C
组织	256KX18
输出特性	3-STATE
封装主体材料	PLASTIC/EPOXY
封装代码	LQFP
封装等效代码	QFP100,.63X.87
封装形状	RECTANGULAR
封装形式	FLATPACK, LOW PROFILE
并行/串行	PARALLEL
峰值回流温度（摄氏度）	260
电源	3.3 V
认证状态	Not Qualified
座面最大高度	1.6 mm
最大待机电流	0.035 A
最小待机电流	3.14 V
最大压摆率	0.305 mA
最大供电电压 (Vsup)	3.465 V
最小供电电压 (Vsup)	3.135 V
标称供电电压 (Vsup)	3.3 V
表面贴装	YES
技术	CMOS
温度等级	INDUSTRIAL
端子面层	Matte Tin (Sn) - annealed
端子形式	GULL WING
端子节距	0.65 mm
端子位置	QUAD
处于峰值回流温度下的最长时间	30
宽度	14 mm
Base Number Matches	1

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128K x 36, 256K x 18

3.3V Synchronous SRAMs

3.3V I/O, Pipelined Outputs

Burst Counter, Single Cycle Deselect

◆

IDT71V3576S

IDT71V3578S

Features

Description

◆

128K x 36, 256K x 18 memory configurations

Supports high system speed:

Commercial and Industrial:

– 150MHz 3.8ns clock access time

– 133MHz 4.2ns clock access time

LBO

input selects interleaved or linear burst mode

Self-timed write cycle with global write control (GW), byte write

enable (BWE), and byte writes (BWx)

3.3V core power supply

Power down controlled by ZZ input

3.3V I/O

Packaged in a JEDEC Standard 100-pin plastic thin quad

flatpack (TQFP)

The IDT71V3576/78 are high-speed SRAMs organized as

128K x 36/256K x 18. The IDT71V3576/78 SRAMs contain write, data,

address and control registers. Internal logic allows the SRAM to generate

a self-timed write based upon a decision which can be left until the end of

the write cycle.

The burst mode feature offers the highest level of performance to the

system designer, as the IDT71V3576/78 can provide four cycles of data

for a single address presented to the SRAM. An internal burst address

counter accepts the first cycle address from the processor, initiating the

access sequence. The first cycle of output data will be pipelined for one

cycle before it is available on the next rising clock edge. If burst mode

operation is selected (ADV=LOW), the subsequent three cycles of output

data will be available to the user on the next three rising clock edges. The

order of these three addresses are defined by the internal burst counter

and the

LBO

input pin.

The IDT71V3576/78 SRAMs utilize IDT’s latest high-performance

CMOS process and are packaged in a JEDEC standard 14mm x 20mm

100-pin thin plastic quad flatpack (TQFP).

Pin Description Summary

-A

BWE

(1)

CLK

ADV

ADSC

ADSP

LBO

I/O

-I/O

, I/O

-I/O

, V

DDQ

Address Inputs

Chip Enable

Chip Selects

Output Enable

Global Write Enable

Byte Write Enable

Individual Byte Write Selects

Clock

Burst Address Advance

Address Status (Cache Controller)

Address Status (Processor)

Linear / Interleaved Burst Order

Sleep Mode

Data Input / Output

Core Power, I/O Power

Ground

Input

I/O

Supply

Synchronous

Asynchronous

Synchronous

N/A

Synchronous

Asynchronous

Synchronous

N/A

5279 tbl 01

NOTE:

and

are not applicable for the IDT71V3578.

The IDT logo is a registered trademark of Integrated Device Technology, Inc.

FEBRUARY 2012

DSC-5279/06

IDT71V3578S150PFGI8相似产品对比

	IDT71V3578S150PFGI8	IDT71V3578S133PFG8	IDT71V3578S133PFGI8	IDT71V3578S150PFG	IDT71V3578YS133PFG	IDT71V3578S133PFGI	IDT71V3578S150PFG8	IDT71V3576S133PFGI8	IDT71V3578S133PFG	IDT71V3578S150PFGI
描述	Cache SRAM, 256KX18, 3.8ns, CMOS, PQFP100, 14 X 20 MM, PLASTIC, TQFP-100	Cache SRAM, 256KX18, 4.2ns, CMOS, PQFP100, 14 X 20 MM, PLASTIC, TQFP-100	Cache SRAM, 256KX18, 4.2ns, CMOS, PQFP100, 14 X 20 MM, PLASTIC, TQFP-100	Cache SRAM, 256KX18, 3.8ns, CMOS, PQFP100, 14 X 20 MM, ROHS COMPLIANT, PLASTIC, TQFP-100	Cache SRAM, 256KX18, 4.2ns, CMOS, PQFP100, 14 X 20 MM, ROHS COMPLIANT, PLASTIC, TQFP-100	Cache SRAM, 256KX18, 4.2ns, CMOS, PQFP100, 14 X 20 MM, ROHS COMPLIANT, PLASTIC, TQFP-100	Cache SRAM, 256KX18, 3.8ns, CMOS, PQFP100, 14 X 20 MM, PLASTIC, TQFP-100	Cache SRAM, 128KX36, 4.2ns, CMOS, PQFP100, 14 X 20 MM, ROHS COMPLIANT, PLASTIC, TQFP-100	Cache SRAM, 256KX18, 4.2ns, CMOS, PQFP100, 14 X 20 MM, ROHS COMPLIANT, PLASTIC, TQFP-100	Cache SRAM, 256KX18, 3.8ns, CMOS, PQFP100, 14 X 20 MM, ROHS COMPLIANT, PLASTIC, TQFP-100
是否Rohs认证	符合	符合	符合	符合	符合	符合	符合	符合	符合	符合
零件包装代码	QFP	QFP	QFP	QFP	QFP	QFP	QFP	QFP	QFP	QFP
包装说明	LQFP, QFP100,.63X.87	LQFP, QFP100,.63X.87	LQFP, QFP100,.63X.87	LQFP, QFP100,.63X.87	14 X 20 MM, ROHS COMPLIANT, PLASTIC, TQFP-100	LQFP, QFP100,.63X.87	LQFP, QFP100,.63X.87	LQFP, QFP100,.63X.87	LQFP, QFP100,.63X.87	LQFP, QFP100,.63X.87
针数	100	100	100	100	100	100	100	100	100	100
Reach Compliance Code	compliant	compliant	compliant	compliant	compliant	compliant	compliant	compliant	compliant	compliant
ECCN代码	3A991.B.2.A	3A991.B.2.A	3A991.B.2.A	3A991.B.2.A	3A991.B.2.A	3A991.B.2.A	3A991.B.2.A	3A991.B.2.A	3A991.B.2.A	3A991.B.2.A
最长访问时间	3.8 ns	4.2 ns	4.2 ns	3.8 ns	4.2 ns	4.2 ns	3.8 ns	4.2 ns	4.2 ns	3.8 ns
其他特性	PIPELINED ARCHITECTURE	PIPELINED ARCHITECTURE	PIPELINED ARCHITECTURE	PIPELINED ARCHITECTURE	PIPELINED ARCHITECTURE	PIPELINED ARCHITECTURE	PIPELINED ARCHITECTURE	PIPELINED ARCHITECTURE	PIPELINED ARCHITECTURE	PIPELINED ARCHITECTURE
JESD-30 代码	R-PQFP-G100	R-PQFP-G100	R-PQFP-G100	R-PQFP-G100	R-PQFP-G100	R-PQFP-G100	R-PQFP-G100	R-PQFP-G100	R-PQFP-G100	R-PQFP-G100
JESD-609代码	e3	e3	e3	e3	e3	e3	e3	e3	e3	e3
长度	20 mm	20 mm	20 mm	20 mm	20 mm	20 mm	20 mm	20 mm	20 mm	20 mm
内存密度	4718592 bit	4718592 bit	4718592 bit	4718592 bit	4718592 bit	4718592 bit	4718592 bit	4718592 bit	4718592 bit	4718592 bit
内存集成电路类型	CACHE SRAM	CACHE SRAM	CACHE SRAM	CACHE SRAM	CACHE SRAM	CACHE SRAM	CACHE SRAM	CACHE SRAM	CACHE SRAM	CACHE SRAM
内存宽度	18	18	18	18	18	18	18	36	18	18
湿度敏感等级	3	3	3	3	3	3	3	3	3	3
功能数量	1	1	1	1	1	1	1	1	1	1
端子数量	100	100	100	100	100	100	100	100	100	100
字数	262144 words	262144 words	262144 words	262144 words	262144 words	262144 words	262144 words	131072 words	262144 words	262144 words
字数代码	256000	256000	256000	256000	256000	256000	256000	128000	256000	256000
工作模式	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS
最高工作温度	85 °C	70 °C	85 °C	70 °C	70 °C	85 °C	70 °C	85 °C	70 °C	85 °C
组织	256KX18	256KX18	256KX18	256KX18	256KX18	256KX18	256KX18	128KX36	256KX18	256KX18
封装主体材料	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
封装代码	LQFP	LQFP	LQFP	LQFP	LQFP	LQFP	LQFP	LQFP	LQFP	LQFP
封装形状	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR
封装形式	FLATPACK, LOW PROFILE	FLATPACK, LOW PROFILE	FLATPACK, LOW PROFILE	FLATPACK, LOW PROFILE	FLATPACK, LOW PROFILE	FLATPACK, LOW PROFILE	FLATPACK, LOW PROFILE	FLATPACK, LOW PROFILE	FLATPACK, LOW PROFILE	FLATPACK, LOW PROFILE
并行/串行	PARALLEL	PARALLEL	PARALLEL	PARALLEL	PARALLEL	PARALLEL	PARALLEL	PARALLEL	PARALLEL	PARALLEL
峰值回流温度（摄氏度）	260	260	260	260	260	260	260	260	260	260
认证状态	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified
座面最大高度	1.6 mm	1.6 mm	1.6 mm	1.6 mm	1.6 mm	1.6 mm	1.6 mm	1.6 mm	1.6 mm	1.6 mm
最大供电电压 (Vsup)	3.465 V	3.465 V	3.465 V	3.465 V	3.465 V	3.465 V	3.465 V	3.465 V	3.465 V	3.465 V
最小供电电压 (Vsup)	3.135 V	3.135 V	3.135 V	3.135 V	3.135 V	3.135 V	3.135 V	3.135 V	3.135 V	3.135 V
标称供电电压 (Vsup)	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V
表面贴装	YES	YES	YES	YES	YES	YES	YES	YES	YES	YES
技术	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS
温度等级	INDUSTRIAL	COMMERCIAL	INDUSTRIAL	COMMERCIAL	COMMERCIAL	INDUSTRIAL	COMMERCIAL	INDUSTRIAL	COMMERCIAL	INDUSTRIAL
端子面层	Matte Tin (Sn) - annealed	Matte Tin (Sn) - annealed	Matte Tin (Sn) - annealed	Matte Tin (Sn) - annealed	MATTE TIN	Matte Tin (Sn) - annealed	Matte Tin (Sn) - annealed	Matte Tin (Sn) - annealed	Matte Tin (Sn) - annealed	Matte Tin (Sn) - annealed
端子形式	GULL WING	GULL WING	GULL WING	GULL WING	GULL WING	GULL WING	GULL WING	GULL WING	GULL WING	GULL WING
端子节距	0.65 mm	0.65 mm	0.65 mm	0.65 mm	0.65 mm	0.65 mm	0.65 mm	0.65 mm	0.65 mm	0.65 mm
端子位置	QUAD	QUAD	QUAD	QUAD	QUAD	QUAD	QUAD	QUAD	QUAD	QUAD
处于峰值回流温度下的最长时间	30	30	30	30	30	30	30	30	30	30
宽度	14 mm	14 mm	14 mm	14 mm	14 mm	14 mm	14 mm	14 mm	14 mm	14 mm
Base Number Matches	1	1	1	1	1	1	1	1	1	1
是否无铅	不含铅	不含铅	不含铅	不含铅	-	不含铅	不含铅	不含铅	不含铅	不含铅
厂商名称	IDT (Integrated Device Technology)	-	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)
最大时钟频率 (fCLK)	150 MHz	133 MHz	133 MHz	150 MHz	-	133 MHz	150 MHz	133 MHz	133 MHz	150 MHz
I/O 类型	COMMON	COMMON	COMMON	COMMON	-	COMMON	COMMON	COMMON	COMMON	COMMON
输出特性	3-STATE	3-STATE	3-STATE	3-STATE	-	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE
封装等效代码	QFP100,.63X.87	QFP100,.63X.87	QFP100,.63X.87	QFP100,.63X.87	-	QFP100,.63X.87	QFP100,.63X.87	QFP100,.63X.87	QFP100,.63X.87	QFP100,.63X.87
电源	3.3 V	3.3 V	3.3 V	3.3 V	-	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V
最大待机电流	0.035 A	0.03 A	0.035 A	0.03 A	-	0.035 A	0.03 A	0.035 A	0.03 A	0.035 A
最小待机电流	3.14 V	3.14 V	3.14 V	3.14 V	-	3.14 V	3.14 V	3.14 V	3.14 V	3.14 V
最大压摆率	0.305 mA	0.25 mA	0.26 mA	0.295 mA	-	0.26 mA	0.295 mA	0.26 mA	0.25 mA	0.305 mA

IDT71V3578S150PFGI8

IDT71V3578S150PFGI8概述

IDT71V3578S150PFGI8规格参数

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IDT71V3578S150PFGI8相似产品对比

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