Integrated quality-of-service (QoS) features such as
prioritized random access, contention-free access, and
segment bursting
56-bit DES Link Encryption with key management for
secure powerline communications
E
2
PROM interface for fast access to configuration
parameters allows system designs to leverage standard
Ethernet drivers
IEEE 1149.1 JTAG Test Access Port
3.3 V signaling, 5 V tolerant interface
Support for three status LEDs
144-pin LQFP package
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Applications
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Shared broadband Internet access
using standard in-home powerlines
Internet Appliances
PC file and application sharing
Peripheral and printer sharing
Networked gaming
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General Description
The INT5130 IC is an integrated powerline MAC/PHY transceiver providing
No New Wires
TM
communications
to any room, over any wire, at speeds of up to 14 Mbps. The INT5130 provides the ability to select between a
complete Media Independent Interface (MII) or a reduced General Purpose Serial Interface (GPSI) for
interconnection to the external MAC controller. The INT5130 also provides the option of selecting between a
Management Data Interface (MDI) or a simple Serial Peripheral Interface (SPI) for handling the management
and control of the MII/GPSI interface.
INTELLON CONFIDENTIAL
1
ADVANCE INFORMATION
Rev 8.1
INT5130 Integrated Powerline MAC/PHY Transceiver Technical Data Sheet
The INT5130 implements Intellon’s patented PowerPacket OFDM technology and is fully compliant with the
HomePlug Powerline Alliance Industry Specification v1.0.
Specifically tailored to reliably deliver up to 14
Mbps over the difficult powerline communication environment, the INT5130 combats deep attenuation notches,
noises sources, and multi-path fading by allocating usable frequencies according to the signal to noise ratio
(SNR). Synchronization is achieved in low SNR channels without the use of pilot carriers. The MAC
implements a CSMA/CA scheme with prioritization and automatic repeat request (ARQ) for reliable delivery of
Ethernet packets via packet encapsulation. Built-in quality-of-service (QoS) features provide the necessary
bandwidth for multimedia payloads including voice, data, audio, and video. Prioritized random access along with
segment bursting minimizes the demands on the receiver resources and maximizes the throughput of the
network while still providing excellent latency response and jitter performance. The INT5130’s contention-free
access capability extends this concept of segment bursting to allow the transmission of multiple frames over
the powerline without relinquishing the control of the medium. Utilizing contention-free access, a single station
may act as a controller for the entire network.
System designers have the option of embedding PowerPacket-specific control information within the packet
stream for optimal control and performance or may choose to provide this information via the separate
E
2
PROM interface. Providing this configuration and control information through a separate E
2
PROM interface
allows the system designer to leverage standard Ethernet drivers.
The INT5130 operates on both 2.5V and 3.3V supplies, offers 5V I/O tolerance, and is packaged in a 144-pin
LQFP. Intellon offers a complete solution for powerline communication applications by providing the INT5130 in
conjunction with the INT1000 Analog Conversion IC.
Functional Block Diagram
INT5130
RESET
PowerPacket MAC
Interface Block
PowerPacket PHY
ROM
Config
Regs
RISC
uProc
Core
PHY
Core
AFE
Interface
RAM
Power
&
GND
MDIO Control
MDCLK/MDIO
- OR -
SPI Control
SDI,SDO,SCLK,CS
MDI/SPI
Select
MII
RX[3:0],RXCLK,RXDV,RX_ER
TX[3:0],TXCLK,TXEN,TX_ER
COL,CRS
- OR -
GPSI
RXD,RXCLK,RXEN
TXD,TXCLK,TXEN
COL,TXBSY
MII/GPSI
Select
Gain
Control
MII/GPSI
Interface
Arbiter
DMA
&
Link
Sequencer
ADC
DAC
IFace
Buffer
RAM
JTAG
Port
JTAG
Control
MDIO
Address
Select
Configuration
EEPROM
Control
E
2
PROM
Control
LED
Control
LEDs
CLK IN
CLK OUT
INTELLON CONFIDENTIAL
2
ADVANCE INFORMATION
Rev 8.1
INT5130 Integrated Powerline MAC/PHY Transceiver Technical Data Sheet
Contents
Features .......................................................................................................................................................... 1
General Description........................................................................................................................................ 1
Pin Descriptions by Group............................................................................................................................. 5
MII Data Interface with MDI Control .......................................................................................................... 11
MII Interface............................................................................................................................................ 11
MDI Control Interface............................................................................................................................. 17
MII Management Register Set ............................................................................................................... 18
GPSI Interface with SPI Control................................................................................................................ 21
DC Characteristics ....................................................................................................................................... 35
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