Small−Signal Transistors, FETs and Diodes Device Data
1
MGSF3441XT1
ELECTRICAL CHARACTERISTICS
(T
A
= 25°C unless otherwise noted)
Characteristic
OFF CHARACTERISTICS
Drain−to−Source Breakdown Voltage
(V
GS
= 0 Vdc, I
D
= 10
µA)
Zero Gate Voltage Drain Current
(V
DS
= 20 Vdc, V
GS
= 0 Vdc)
(V
DS
= 20 Vdc, V
GS
= 0 Vdc, T
J
= 70°C)
Gate−Body Leakage Current (V
GS
=
±
8.0 Vdc, V
DS
= 0)
ON CHARACTERISTICS
(1)
Gate Threshold Voltage
(V
DS
= V
GS
, I
D
= 250
µAdc)
Static Drain−to−Source On−Resistance
(V
GS
= 4.5 Vdc, I
D
= 1.5 A)
(V
GS
= 2.5 Vdc, I
D
= 1.2 A)
DYNAMIC CHARACTERISTICS
Input Capacitance
Output Capacitance
Transfer Capacitance
SWITCHING CHARACTERISTICS
(2)
Turn−On Delay Time
Rise Time
Turn−Off Delay Time
Fall Time
Gate Charge
SOURCE−DRAIN DIODE CHARACTERISTICS
Continuous Current
Pulsed Current
Forward Voltage
(2)
(1) Pulse Test: Pulse Width
≤
300
µs,
Duty Cycle
≤
2%.
(2) Switching characteristics are independent of operating junction temperature.
I
S
I
SM
V
SD
—
—
—
—
—
0.80
1.0
20
1.2
A
A
V
(V
DD
= 15 Vdc, I
D
= 1.0 A,
V
GEN
= 10 V, R
L
= 10
Ω)
t
d(on)
t
r
t
d(off)
t
f
Q
T
—
—
—
—
—
27
17
52
45
3000
50
30
80
70
—
pC
ns
(V
DS
= 5.0 V)
(V
DS
= 5.0 V)
(V
DG
= 5.0 V)
C
iss
C
oss
C
rss
—
—
—
90
50
10
—
—
—
pF
V
GS(th)
0.45
r
DS(on)
—
—
0.078
0.110
0.100
0.135
—
—
Ohms
Vdc
V
(BR)DSS
20
I
DSS
—
—
I
GSS
—
—
—
—
1.0
4.0
±100
nAdc
—
—
µAdc
Vdc
Symbol
Min
Typ
Max
Unit
2
Motorola Small−Signal Transistors, FETs and Diodes Device Data
MGSF3441XT1
INFORMATION FOR USING THE TSOP−6 SURFACE MOUNT PACKAGE
MINIMUM RECOMMENDED FOOTPRINT FOR SURFACE MOUNTED APPLICATIONS
Surface mount board layout is a critical portion of the total
design. The footprint for the semiconductor packages must
be the correct size to insure proper solder connection
0.094
2.4
interface between the board and the package. With the
correct pad geometry, the packages will self align when
subjected to a solder reflow process.
0.037
0.95
0.074
1.9
0.037
0.95
0.028
0.7
0.039
1.0
inches
mm
TSOP−6
TSOP−6 POWER DISSIPATION
The power dissipation of the TSOP−6 is a function of the
drain pad size. This can vary from the minimum pad size for
soldering to a pad size given for maximum power dissipation.
Power dissipation for a surface mount device is determined
by T
J(max)
, the maximum rated junction temperature of the
die, R
θJA
, the thermal resistance from the device junction to
ambient, and the operating temperature, T
A
. Using the
values provided on the data sheet for the TSOP−6 package,
P
D
can be calculated as follows:
P
D
=
T
J(max)
− T
A
R
θJA
SOLDERING PRECAUTIONS
The melting temperature of solder is higher than the rated
temperature of the device. When the entire device is heated
to a high temperature, failure to complete soldering within a
short time could result in device failure. Therefore, the
following items should always be observed in order to
minimize the thermal stress to which the devices are
subjected.
•
Always preheat the device.
•
The delta temperature between the preheat and
soldering should be 100°C or less.*
•
When preheating and soldering, the temperature of the
leads and the case must not exceed the maximum
temperature ratings as shown on the data sheet. When
using infrared heating with the reflow soldering method,
the difference shall be a maximum of 10°C.
•
The soldering temperature and time shall not exceed
260°C for more than 10 seconds.
•
When shifting from preheating to soldering, the
maximum temperature gradient shall be 5°C or less.
•
After soldering has been completed, the device should
be allowed to cool naturally for at least three minutes.
Gradual cooling should be used as the use of forced
cooling will increase the temperature gradient and result
in latent failure due to mechanical stress.
•
Mechanical stress or shock should not be applied during
cooling.
* Soldering a device without preheating can cause excessive
thermal shock and stress which can result in damage to the
device.
The values for the equation are found in the maximum
ratings table on the data sheet. Substituting these values into
the equation for an ambient temperature T
A
of 25°C, one can
calculate the power dissipation of the device which in this
case is 950 milliwatts.
P
D
=
150°C − 25°C
132°C/W
= 950 milliwatts
The 132°C/W for the TSOP−6 package assumes the use
of the recommended footprint on a glass epoxy printed circuit
board to achieve a power dissipation of 950 milliwatts. There
are other alternatives to achieving higher power dissipation
from the TSOP−6 package. Another alternative would be to
use a ceramic substrate or an aluminum core board such as
Thermal Clad™. Using a board material such as Thermal
Clad, an aluminum core board, the power dissipation can be
doubled using the same footprint.
Motorola Small−Signal Transistors, FETs and Diodes Device Data
3
MGSF3441XT1
PACKAGE DIMENSIONS
A
L
6
5
1
2
4
3
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD
FINISH THICKNESS. MINIMUM LEAD THICKNESS
IS THE MINIMUM THICKNESS OF BASE
MATERIAL.
DIM
A
B
C
D
G
H
J
K
L
M
S
MILLIMETERS
MIN
MAX
2.90
3.10
1.30
1.70
0.90
1.10
0.25
0.50
0.85
1.05
0.013
0.100
0.10
0.26
0.20
0.60
1.25
1.55
0
_
10
_
2.50
3.00
STYLE 1:
PIN 1.
2.
3.
4.
5.
6.
INCHES
MIN
MAX
0.1142 0.1220
0.0512 0.0669
0.0354 0.0433
0.0098 0.0197
0.0335 0.0413
0.0005 0.0040
0.0040 0.0102
0.0079 0.0236
0.0493 0.0610
0
_
10
_
0.0985 0.1181
S
B
D
G
M
0.05 (0.002)
H
C
K
J
CASE 318G−02
ISSUE A
TSOP 6 PLASTIC
DRAIN
DRAIN
GATE
SOURCE
DRAIN
DRAIN
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This device has a class 1 ESD rating.
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