March 1996
NDS356P
P-Channel Logic Level Enhancement Mode Field Effect Transistor
General Description
These P-Channel logic level enhancement mode power
field effect transistors are produced using Fairchild's
proprietary, high cell density, DMOS technology. This
very high density process is especially tailored to
minimize on-state resistance. These devices are
particularly suited for low voltage applications such as
notebook computer power management, portable
electronics, and other battery powered circuits where
fast high-side switching, and low in-line power loss are
needed in a very small outline surface mount package.
Features
-1.1 A, -20V. R
DS(ON)
= 0.3
Ω
@ V
GS
= -4.5V.
Proprietary package design using copper lead frame for
superior thermal and electrical capabilities.
High density cell design for extremely low R
DS(ON)
.
Exceptional on-resistance and maximum DC current
capability.
Compact industry standard SOT-23 surface mount
package.
_______________________________________________________________________________
D
G
S
Absolute Maximum Ratings
Symbol
V
DSS
V
GSS
I
D
P
D
T
J
,T
STG
Parameter
Drain-Source Voltage
T
A
= 25°C unless otherwise noted
NDS356P
-20
± 12
(Note 1a)
Units
V
V
A
Gate-Source Voltage - Continuous
Maximum Drain Current
- Continuous
- Pulsed
Maximum Power Dissipation
(Note 1a)
(Note 1b)
±1.1
±10
0.5
0.46
-55 to 150
W
Operating and Storage Temperature Range
°C
THERMAL CHARACTERISTICS
R
θ
JA
R
θ
JC
Thermal Resistance, Junction-to-Ambient
(Note 1a)
250
(Note 1)
°C/W
°C/W
Thermal Resistance, Junction-to-Case
75
© 1997 Fairchild Semiconductor Corporation
NDS356P Rev. E1
Electrical Characteristics
(T
A
= 25°C unless otherwise noted)
Symbol
Parameter
Conditions
Min
Typ
Max
Units
OFF CHARACTERISTICS
BV
DSS
I
DSS
I
GSSF
I
GSSR
V
GS(th)
R
DS(ON)
Drain-Source Breakdown Voltage
Zero Gate Voltage Drain Current
V
GS
= 0 V, I
D
= -250 µA
V
DS
= -16 V, V
GS
= 0 V
T
J
=125°C
Gate - Body Leakage, Forward
Gate - Body Leakage, Reverse
V
GS
= 12 V, V
DS
= 0 V
V
GS
= -12 V, V
DS
= 0 V
V
DS
= V
GS
, I
D
= -250 µA
T
J
=125°C
Static Drain-Source On-Resistance
V
GS
= -4.5 V, I
D
= -1.1 A
T
J
=125°C
V
GS
= -10 V, I
D
= -1.3 A
I
D(ON)
g
FS
C
iss
C
oss
C
rss
t
d(on)
t
r
t
d(off)
t
f
Q
g
Q
gs
Q
gd
On-State Drain Current
Forward Transconductance
V
GS
= -4.5 V, V
DS
= -5 V
V
DS
= -5 V, I
D
= -1.1 A
V
DS
= -10 V, V
GS
= 0 V,
f = 1.0 MHz
-3
1.8
-0.8
-0.5
-1.6
-1.3
-20
-5
-20
100
-100
V
µA
µA
nA
nA
ON CHARACTERISTICS
(Note 2)
Gate Threshold Voltage
-2.5
-2.2
0.3
0.4
0.21
A
S
V
Ω
DYNAMIC CHARACTERISTICS
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
180
255
60
pF
pF
pF
SWITCHING CHARACTERISTICS
(Note 2)
Turn - On Delay Time
Turn - On Rise Time
Turn - Off Delay Time
Turn - Off Fall Time
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
V
DS
= -10 V, I
D
= -1.1 A,
V
GS
= -5 V
V
DD
= -10 V, I
D
= -1 A,
V
GS
= -10 V, R
GEN
= 50
Ω
7
17
56
41
3.5
15
30
90
80
5
1.5
2
ns
ns
ns
ns
nC
nC
nC
NDS356P Rev. E1
Electrical Characteristics
(T
A
= 25°C unless otherwise noted)
Symbol
Parameter
Conditions
Min
Typ
Max
Units
DRAIN-SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS
I
S
I
SM
V
SD
Notes:
1. R
θ
JA
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. R
θ
JC
is guaranteed by
design while R
θ
CA
is determined by the user's board design.
Maximum Continuous Drain-Source Diode Forward Current
Maximum Pulsed Drain-Source Diode Forward Current
Drain-Source Diode Forward Voltage
V
GS
= 0 V, I
S
= -1.1 A
(Note 2)
-0.85
-0.6
-4
-1.2
A
A
V
P
D
(
t
) =
R
θ
J A
t
)
(
T
J
−
T
A
=
R
θ
J C
R
θ
CA
t
)
+
(
T
J
−
T
A
=
I
2
(
t
) ×
R
DS
(
ON
)
D
T
J
Typical R
θ
JA
using the board layouts shown below on 4.5"x5" FR-4 PCB in a still air environment:
a. 250
o
C/W when mounted on a 0.02 in
2
pad of 2oz cpper.
b. 270
o
C/W when mounted on a 0.001 in
2
pad of 2oz cpper.
1a
1b
Scale 1 : 1 on letter size paper
2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%.
NDS356P Rev. E1
Typical Electrical Characteristics
-5
2
V
GS
= -10V
I
D
, DRAIN-SOURCE CURRENT (A)
-4
-6.0
-4.5
R
DS(on)
, NORMALIZED
DRAIN-SOURCE ON-RESISTANCE
-5.0
V
1.75
GS
= -3.5 V
-4.0
1.5
-3
-4.0
-4.5
1.25
-2
-5.0
1
-3.5
-1
-6.0
0.75
-3.0
0
0
-0.5
V
DS
-10
0.5
0
-1
-2
-3
I
D
, DRAIN CURRENT (A)
-4
-5
-1
-1.5
-2
, DRAIN-SOURCE VOLTAGE (V)
-2.5
-3
Figure 1. On-Region Characteristics
Figure 2. On-Resistance Variation
with Drain Current and Gate Voltage
1.3
R
DS(ON)
, NORMALIZED
DRAIN-SOURCE ON-RESISTANCE
3.5
I
D
= -1.1 A
1.2
DRAIN-SOURCE ON-RESISTANCE
V
GS
= 4.5V
3
V
GS
= -4.5 V
R
DS(on)
, NORMALIZED
2.5
1.1
2
1
T J = 125°C
1.5
0.9
25°C
1
-55°C
0.5
0
-1
-2
-3
-4
-5
-6
0.8
-50
-25
0
25
50
75
100
T
J
, JUNCTION TEMPERATURE (°C)
125
150
I
D
, DRAIN CURRENT (A)
Figure 3. On-Resistance Variation
with Temperature
Figure 4. On-Resistance Variation
with Drain Current and Temperature
V
DS
= 1 0 V
TJ = -55°C
25
125
V
th
, NORMALIZED
GATE-SOURCE THRESHOLD VOLTAGE (V)
-10
1.15
1.1
1.05
1
0.95
0.9
0.85
0.8
-50
V
DS
= V
GS
I
D
= -250µA
I
D
, DRAIN CURRENT (A)
-8
-6
-4
-2
0
0
-2
-4
-6
-8
-25
V
GS
, GATE TO SOURCE VOLTAGE (V)
0
25
50
75
100
T
J
, JUNCTION TEMPERATURE (°C)
125
150
Figure 5. Transfer Characteristics
Figure 6. Gate Threshold Variation
with Temperature
NDS356P Rev. E1
Typical Electrical Characteristics
(continued)
DRAIN-SOURCE BREAKDOWN VOLTAGE (V)
1.08
10
1.06
-I
S
, REVERSE DRAIN CURRENT (A)
I
D
= -250µA
V
2
1
0.5
0.2
0.1
GS
= 0V
BV
DSS
, NORMALIZED
T J = 125°C
25°C
-55°C
1.04
1.02
1
0.01
0.98
0.96
-50
-25
0
25
50
75
100
T
J
, JUNCTION TEMPERATURE (°C)
125
150
0.001
-0.3
-0.6
-0.9
-1.2
-1.5
-1.8
V
SD
, BODY DIODE FORWARD VOLTAGE (V)
Figure 7. Breakdown Voltage Variation with
Temperature
Figure 8. Body Diode Forward Voltage Variation with
Source Current and Temperature
700
500
, GATE-SOURCE VOLTAGE (V)
-10
I
-8
D
= -1.1 A
V
= -5 V
-10
300
CAPACITANCE (pF)
200
Ciss
DS
-6
Coss
100
-4
f = 1 MHz
50
30
0.1
V
0
20
V
GS
= 0 V
Crss
0.5
1
2
5
10
0.2
-V
DS
GS
-2
0
1
2
3
4
5
6
7
, DRAIN TO SOURCE VOLTAGE (V)
Q
g
, GATE CHARGE (nC)
Figure 9. Capacitance Characteristics
Figure 10. Gate Charge Characteristics
V
DD
t
d(on)
t
on
t
off
t
r
90%
t
d(off)
90%
V
IN
D
R
L
V
OUT
V
OUT
10%
t
f
V
GS
R
GEN
10%
90%
G
DUT
S
V
IN
10%
50%
50%
PULSE WIDTH
INVERTED
Figure 11. Switching Test Circuit
Figure 12. Switching Waveforms
NDS356P Rev. E1
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