IDT5V551
1:4 CLOCK BUFFER
INDUSTRIAL TEMPERATURE RANGE
1:4 CLOCK BUFFER
IDT5V551
FEATURES:
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•
•
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Advanced, low power CMOS process
5V tolerant inputs
Low skew outputs (<250ps)
Input/Output frequency up to 160MHz
Non-inverting output clock
Ideal for networking clocks
Operating voltage of 3V
Output enable mode tri-states outputs
Lead-free packaging available
Available in SOIC package
DESCRIPTION:
The 5V551 clock driver is built using advanced CMOS technology. This
low skew clock driver offers 1:4 fanout. The fanout from a single input reduces
loading on the preceding driver and provides an efficient clock distribution
network. The 5V551 offers low capacitance inputs. Typical applications are
clock and signal distribution.
FUNCTIONAL BLOCK DIAGRAM
Q
1
PIN CONFIGURATION
ICLK
1
2
3
4
8
7
6
5
OE
V
DD
GND
Q
4
Q
2
ICLK
Q
3
Q
1
Q
2
Q
3
Q
4
SOIC
TOP VIEW
OUTPUT ENABLE
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
INDUSTRIAL TEMPERATURE RANGE
1
c
2006 Integrated Device Technology, Inc.
MARCH 2010
DSC - 6567/10
IDT5V551
1:4 CLOCK BUFFER
INDUSTRIAL TEMPERATURE RANGE
ABSOLUTE MAXIMUM RATINGS
(1)
Symbol
V
DD
V
TERM
T
A
T
STG
T
J
T
SOLDER
Description
Supply Voltage
All Inputs
All Outputs
Ambient Operating Temp
Storage Temperature
Junction Temperature
Soldering Temperature
Max.
–0.5 to +4.6
–0.5 to +7
–0.5 to V
DD
+ 0.5
–40 to +85
–65 to +150
150
260
°C
°C
°C
°C
Unit
V
V
PIN DESCRIPTION
Name
ICLK
Qn
GND
V
DD
OE
Type
Input
Output
PWR
PWR
Input
Clock Outputs
Connect to Ground
Connect to 3.3V
Output Enable. Tri-states outputs when LOW.
Internal pull-up resistor.
Description
Clock Input, internal pull-up resistor
NOTE:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.
EXTERNAL COMPONENTS
A minimum number of external components are required for proper operation.
A decoupling capacitor of 0.01µF should be connected between V
DD
on pin 7
and GND on pin 6, as close to the device as possible. A 33Ωseries terminating
resistor may be used on each clock output if the trace is longer than one inch.
RECOMMENDED OPERATING RANGE
Symbol
T
A
V
DD
Description
Ambient Operating Temperature
Power Supply Voltage (measured in respect to GND)
Min.
–40
3
Typ.
—
—
Max.
+85
3.6
Unit
°C
V
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified
T
A
= -40°C to +85°C, V
DD
= 3.3V ± 5%
Symbol
V
DD
V
IH
V
IL
V
IH
V
IL
V
OH
V
OL
V
OH
I
DD
Z
O
R
PU
C
IN
I
OS
Parameter
Operating Voltage
Input HIGH Voltage, ICLK
(1)
Input LOW Voltage, ICLK
(1)
Input HIGH Voltage, OE
Input LOW Voltage, OE
Output HIGH Voltage
Output LOW Voltage
Output HIGH Voltage (CMOS)
Operating Supply Current
Nominal Output Impedance
Internal Pull-Up Resistor
Input Capacitance
Short Circuit Current
ICLK, OE
X
= 0V
OE Pin
ICLK
I
OH
= –25mA
I
OL
= 25mA
I
OH
= –12mA
No Load, 135MHz
Test Conditions
Min.
3.15
V
DD
/2 + 0.7
—
2
—
2.4
—
V
DD
– 0.4
—
—
—
—
—
—
Typ.
—
—
—
—
—
—
—
—
18
20
350
5
3
±90
Max.
3.45
—
V
DD
/2 – 0.7
—
0.8
—
0.4
—
—
—
—
—
—
—
mA
Unit
V
V
V
V
V
V
V
V
mA
Ω
k
Ω
pF
NOTE:
1. Nominal switching threshold is V
DD
/2.
2
IDT5V551
1:4 CLOCK BUFFER
INDUSTRIAL TEMPERATURE RANGE
AC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified
T
A
= -40°C to +85°C, V
DD
= 3.3V ± 5%
Symbol
F
IN
F
OUT
Parameter
Input Frequency
Output Frequency
(1)
Output Clock Rise Time
Output Clock Fall Time
Propagation Delay
(2)
Output to Output Skew
(3)
Test Conditions
15pF load
0.8V to 2V
2V to 0.8V
135MHz
Rising edges at V
DD
/2
Min.
0
—
—
—
2
—
Typ.
—
—
—
—
4
—
Max.
160
160
1.5
1.5
8
250
Unit
MHz
MHz
ns
ns
ns
ps
t
OR
t
OF
t
PD
t
SK
(
O
)
NOTES:
1. With external series resistor of 33Ω positioned close to each output pin.
2. With rail-to-rail input clock.
3. Between any two outputs with equal loading.
4. Duty cycle on outputs will match incoming clock duty cycle. Consult IDT for tight duty cycle clock generators.
TEST CIRCUIT
V
DD
V
IN
Pulse
Generator
R
T
D.U.T.
R
L
V
OUT
C
L
TEST CONDITIONS
Symbol
C
L
R
T
R
L
t
R
/t
F
V
DD
= 3.3V ± 5%
15
Z
OUT
of pulse generator
33
1 (0V to 3V or 3V to 0V)
Unit
pF
Ω
Ω
ns
DEFINITIONS:
C
L
= Load capacitance: includes jig and probe capacitance.
R
T
= Termination resistance: should be equal to the Z
OUT
of the pulse generator.
t
R
/t
F
= Rise/Fall time of the input stimulus from the pulse generator.
3
IDT5V551
1:4 CLOCK BUFFER
INDUSTRIAL TEMPERATURE RANGE
ORDERING INFORMATION
Part Number
5V551DCGI
5V551DCGI8
Shipping Package
Tubes
Tape and Reel
Package
8SOIC
8SOIC
Temperature
-40 to +85°C
-40 to +85°C
CORPORATE HEADQUARTERS
6024 Silver Creek Valley Road
San Jose, CA 95138
for SALES:
800-345-7015 or 408-284-8200
fax: 408-284-2775
www.idt.com
4
for Tech Support:
clockhelp@idt.com