74LVX374 Low Voltage Octal D-Type Flip-Flop with 3-STATE Outputs
October 1993
Revised March 1999
74LVX374
Low Voltage Octal D-Type Flip-Flop with
3-STATE Outputs
General Description
The LVX374 is a high-speed, low-power octal D-type flip-
flop featuring separate D-type inputs for each flip-flop and
3-STATE outputs for bus-oriented applications. A buffered
Clock (CP) and Output Enable (OE) are common to all flip-
flops. The inputs tolerate up to 7V allowing interface of 5V
systems to 3V systems.
Features
s
Input voltage translation from 5V to 3V
s
Ideal for low power/low noise 3.3V applications
s
Guaranteed simultaneous switching noise level and
dynamic threshold performance
Ordering Code:
Order Number
74LVX374M
74LVX374SJ
74LVX374MTC
Package Number
M20B
M20D
MTC20
Package Description
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300” Wide
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbols
Connection Diagram
IEEE/IEC
Pin Descriptions
Pin Names
D
0
–D
7
CP
OE
O
0
–O
7
Description
Data Inputs
Clock Pulse Input
3-STATE Output Enable Input
3-STATE Outputs
© 1999 Fairchild Semiconductor Corporation
DS011612.prf
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74LVX374
Truth Table
Inputs
D
n
H
L
X
H
=
HIGH Voltage Level
L
=
LOW Voltage Level
X
=
Immaterial
Z
=
High Impedance
=
LOW-to-HIGH Transition
Outputs
OE
L
L
H
O
n
H
L
Z
CP
X
Functional Description
The LVX374 consists of eight edge-triggered flip-flops with
individual D-type inputs and 3-STATE true outputs. The
buffered clock and buffered Output Enable are common to
all flip-flops. The eight flip-flops will store the state of their
individual D inputs that meet the setup and hold time
requirements on the LOW-to-HIGH Clock (CP) transition.
With the Output Enable (OE) LOW, the contents of the
eight flip-flops are available at the outputs. When the OE is
HIGH, the outputs go to the high impedance state. Opera-
tion of the OE input does not affect the state of the flip-
flops.
Logic Diagram
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
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2
74LVX374
Absolute Maximum Ratings
(Note 1)
Supply Voltage (V
CC
)
DC Input Diode Current (I
IK
)
V
I
= −0.5V
DC Input Voltage (V
I
)
DC Output Diode Current (I
OK
)
V
O
= −0.5V
V
O
=
V
CC
+0.5V
DC Output Voltage (V
O
)
DC Output Source
or Sink Current (I
O
)
DC V
CC
or Ground Current
(I
CC
or I
GND
)
Storage Temperature (T
STG
)
Power Dissipation
±75
mA
−65°C
to
+150°C
180mW
±25
mA
−20
mA
+20
mA
−0.5V
to V
CC
+
0.5V
−20
mA
−0.5V
to 7V
−0.5V
to
+7.0V
Recommended Operating
Conditions
(Note 2)
Supply Voltage (V
CC
)
Input Voltage (V
I
)
Output Voltage (V
O
)
Operating Temperature (T
A
)
Input Rise and Fall Time (∆t/∆V)
2.0V to 3.6V
0V to 5.5V
0V to V
CC
−40°C
to
+85°C
0 ns/V to 100 ns/V
Note 1:
The “Absolute Maximum Ratings” are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the absolute maximum ratings.
The “Recommended Operating Conditions” table will define the conditions
for actual device operation.
Note 2:
Unused inputs must be held HIGH or LOW. They may not float.
DC Electrical Characteristics
Symbol
V
IH
Parameter
HIGH Level
Input Voltage
V
IL
LOW Level
Input Voltage
V
OH
HIGH Level
Output Voltage
V
OL
LOW Level
Output Voltage
I
OZ
I
IN
I
CC
3-STATE Output
Off-State Current
Input Leakage Current
Quiescent Supply Current
3.6
3.6
±0.1
4.0
±1.0
40.0
V
CC
2.0
3.0
3.6
2.0
3.0
3.6
2.0
3.0
3.0
2.0
3.0
3.0
3.6
1.9
2.9
2.58
0.0
0.0
0.1
0.1
0.36
±0.25
2.0
3.0
T
A
= +25°C
Min
1.5
2.0
2.4
0.5
0.8
0.8
1.9
2.9
2.48
0.1
0.1
0.44
±2.5
µA
µA
µA
V
V
Typ
Max
T
A
= −40°C
to
+85°C
Min
1.5
2.0
2.4
0.5
0.8
0.8
V
IN
=
V
IH
I
OH
= −
50µA
or V
IL
I
OH
= −50µA
I
OH
= −4mA
V
IN
=
V
IH
I
OL
=
50µA
I
OL
=
4mA
V
IN
=
V
IH
or V
IL
V
OUT
=
V
CC
or GND
V
IN
=
5.5V or GND
V
IN
=
V
CC
or GND
or V
IL
I
OL
=
50µA
V
V
Max
Units
Conditions
Noise Characteristics
(Note 3)
Symbol
V
OLP
V
OLV
V
IHD
V
ILD
Parameter
Quiet Output Maximum Dynamic V
OL
Quiet Output Minimum Dynamic V
OL
Minimum HIGH Level Dynamic Input Voltage
Maximum LOW Level Dynamic Input Voltage
V
CC
(V)
3.3
3.3
3.3
3.3
T
A
=
25°C
Typ
0.5
−0.5
Limit
0.8
−0.8
2.0
0.8
V
V
V
V
Units
C
L
(pF)
50
50
50
50
Note 3:
Input t
r
=
t
f
=
3 ns
3
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74LVX374
AC Electrical Characteristics
Symbol
f
MAX
Parameter
Maximum Clock
Frequency
3.3
±
0.3
t
PLH
t
PHL
Propagation Delay Time
CP to O
n
2.7
3.3
±
0.3
t
PZL
t
PZH
3-STATE Output
Enable Time
3.3
±
0.3
t
PLZ
t
PHZ
t
W
t
S
t
H
t
OSLH
t
OSHL
3-STATE Output
Disable Time
CP Pulse
Width
Setup Time
D
n
to CP
Hold Time
D
n
to CP
Output to Output
Skew (Note 4)
2.7
3.3
±
0.3
2.7
3.3
±
0.3
2.7
3.3
±
0.3
2.7
3.3
±
0.3
2.7
3.3
7.5
5.0
6.5
4.5
2.0
2.0
1.5
1.5
2.7
V
CC
(V)
2.7
T
A
= +25°C
Min
60
45
100
60
Typ
115
60
160
95
8.5
11.0
6.7
9.2
7.6
10.1
5.9
8.4
11.5
9.6
16.3
19.8
10.6
14.1
14.5
18.0
9.3
12.8
18.5
13.2
Max
T
A
= −40°C
to
+85°C
Min
50
40
85
55
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
8.0
5.5
6.5
4.5
2.0
2.0
1.5
1.5
19.5
23.0
12.5
16.0
17.5
21.0
11.0
14.5
22.0
15.0
ns
ns
ns
ns
ns
C
L
=
50 pF
ns
ns
MHz
Max
C
L
=
15 pF
C
L
=
50 pF
C
L
=
15 pF
C
L
=
50 pF
C
L
=
15 pF
C
L
=
50 pF
C
L
=
15 pF
C
L
=
50 pF
C
L
=
15 pF, R
L
=
1 kΩ
C
L
=
50 pF, R
L
=
1 kΩ
C
L
=
15 pF, R
L
=
1 kΩ
C
L
=
50 pF, R
L
=
1 kΩ
C
L
=
50 pF, R
L
=
1 kΩ
C
L
=
50 pF, R
L
=
1 kΩ
Units
Conditions
Note 4:
Parameter guaranteed by design. t
OSLH
=
|t
PLHm
−
t
PLHn
|, t
OSHL
=
|t
PHLm
−
t
PHLn
|
Capacitance
Symbol
C
IN
C
OUT
C
PD
Input Capacitance
Output Capacitance
Power Dissipation
Capacitance (Note 5)
Note 5:
C
PD
is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load.
Parameter
T
A
= +25°C
Min
Typ
4
6
32
Max
10
T
A
= −40°C
to
+85°C
Min
Max
10
Units
pF
pF
pF
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4
74LVX374
Physical Dimensions
inches (millimeters) unless otherwise noted
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300” Wide
Package Number M20B
20-Lead Small Outline Package (SOP) EIAJ TYPE II, 5.3mm Wide
Package Number M20D
5
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