To all our customers
Regarding the change of names mentioned in the document, such as Hitachi
Electric and Hitachi XX, to Renesas Technology Corp.
The semiconductor operations of Mitsubishi Electric and Hitachi were transferred to Renesas
Technology Corporation on April 1st 2003. These operations include microcomputer, logic, analog
and discrete devices, and memory chips other than DRAMs (flash memory, SRAMs etc.)
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names are mentioned in the document, these names have in fact all been changed to Renesas
Technology Corp. Thank you for your understanding. Except for our corporate trademark, logo and
corporate statement, no changes whatsoever have been made to the contents of the document, and
these changes do not constitute any alteration to the contents of the document itself.
Renesas Technology Home Page: http://www.renesas.com
Renesas Technology Corp.
Customer Support Dept.
April 1, 2003
Cautions
Keep safety first in your circuit designs!
1. Renesas Technology Corporation puts the maximum effort into making semiconductor products better
and more reliable, but there is always the possibility that trouble may occur with them. Trouble with
semiconductors may lead to personal injury, fire or property damage.
Remember to give due consideration to safety when making your circuit designs, with appropriate
measures such as (i) placement of substitutive, auxiliary circuits, (ii) use of nonflammable material or
(iii) prevention against any malfunction or mishap.
Notes regarding these materials
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contained therein.
HD74LV126A
Quad. Bus Buffer Gates with 3-state Outputs
ADE-205-259A (Z)
2nd. Edition
Jul. 2001
Description
The HD74LV126A features independent line drivers with three state outputs. Each output is disabled
when the associated output enable (OE) input is low. To ensure the high impedance state during power up
or power down, OE should be connected to GND through a pull-down resistor; the minimum value of the
resistor is determined by the current souring capability of the driver. Low-voltage and high-speed operation
is suitable for the battery-powered products (e.g., notebook computers), and the low-power consumption
extends the battery life.
Features
•
V
CC
= 2.0 V to 5.5 V operation
•
All inputs V
IH
(Max.) = 5.5 V (@V
CC
= 0 V to 5.5 V)
•
All outputs V
O
(Max.) = 5.5 V (@V
CC
= 0 V)
•
Typical V
OL
ground bounce < 0.8 V (@V
CC
= 3.3 V, Ta = 25°C)
•
Typical V
OH
undershoot > 2.3 V (@V
CC
= 3.3 V, Ta = 25°C)
•
Output current ±8 mA (@V
CC
= 3.0 V to 3.6 V), ±16 mA (@V
CC
= 4.5 V to 5.5 V)
Function Table
Inputs
OE
H
H
L
Note: H:
L:
X:
Z:
High level
Low level
Immaterial
High impedance
A
H
L
X
Output Y
H
L
Z
HD74LV126A
Absolute Maximum Ratings
Item
Supply voltage range
Input voltage range*
1
1, 2
Symbol
V
CC
V
I
V
O
I
IK
I
OK
I
O
I
CC
or I
GND
P
T
Ratings
–0.5 to 7.0
–0.5 to 7.0
–0.5 to V
CC
+ 0.5
–0.5 to 7.0
–20
±50
±35
±70
785
500
Unit
V
V
V
Conditions
Output voltage range*
Output: H or L
V
CC
: OFF or Output: Z
Input clamp current
Output clamp current
Continuous output current
Continuous current through
V
CC
or GND
Maximum power dissipation
3
at Ta = 25°C (in still air)*
mA
mA
mA
mA
mW
V
I
< 0
V
O
< 0 or V
O
> V
CC
V
O
= 0 to V
CC
SOP
TSSOP
Storage temperature
Tstg
–65 to 150
°C
Notes: The absolute maximum ratings are values which must not individually be exceeded, and
furthermore, no two of which may be realized at the same time.
1. The input and output voltage ratings may be exceeded if the input and output clamp-current
ratings are observed.
2. This value is limited to 5.5 V maximum.
3. The maximum package power dissipation was calculated using a junction temperature of 150°C.
Rev.1, Jul. 2001, page 3 of 13
FPGA/CPLD
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