74CBTLVD3245-Q100
Rev. 4 — 30 September 2020
8-bit level-shifting bus switch with output enable
Product data sheet
1. General description
The 74CBTLVD3245-Q100 is an 8-pole, single-throw bus switch. The device features a single
output enable input (OE) that controls eight switch channels. The switches are disabled when OE
is HIGH. Schmitt trigger action at control inputs makes the circuit tolerant of slower input rise and
fall times. This device is fully specified for partial power-down applications using I
OFF
. The I
OFF
circuitry disables the output, preventing the damaging backflow current through the device when it
is powered down.
This product has been qualified to the Automotive Electronics Council (AEC) standard Q100
(Grade 1) and is suitable for use in automotive applications.
2. Features and benefits
•
•
•
•
•
Automotive product qualification in accordance with AEC-Q100 (Grade 1)
•
Specified from -40 °C to +85 °C and from -40 °C to +125 °C
Supply voltage range from 3.0 V to 3.6 V
High noise immunity
Complies with JEDEC standard:
•
JESD8-B/JESD36 (3.0 V to 3.6 V)
ESD protection:
•
MIL-STD-883, method 3015 exceeds 2000 V
•
HBM JESD22-A114F exceeds 2000 V
•
CDM AEC-Q100-011 revision B exceeds 1000 V
5 Ω switch connection between two ports
Rail to rail switching on data I/O ports
CMOS low power consumption
Latch-up performance exceeds 250 mA per JESD78B Class I level A
I
OFF
circuitry provides partial Power-down mode operation
DHVQFN package with Side-Wettable Flanks enabling Automatic Optical Inspection (AOI) of
solder joints
•
•
•
•
•
•
3. Ordering information
Table 1. Ordering information
Type number
Package
Temperature range Name
74CBTLVD3245PW-Q100 -40 °C to +125 °C
74CBTLVD3245BQ-Q100 -40 °C to +125 °C
TSSOP20
Description
plastic thin shrink small outline package;
20 leads; body width 4.4 mm
Version
SOT360-1
DHVQFN20 plastic dual in-line compatible thermal
SOT764-1
enhanced very thin quad flat package; no leads;
20 terminals; body 2.5 × 4.5 × 0.85 mm
Nexperia
74CBTLVD3245-Q100
8-bit level-shifting bus switch with output enable
4. Functional diagram
A1
19
2
A2
3
A3
4
A4
5
A5
6
A6
7
A7
8
A8
9
A1
2
18
B1
OE
18
B1
17
B2
16
B3
15
B4
14
B5
13
B6
12
B7
11
B8
A8
OE
9
19
11
B8
001aao116
001aao117
Fig. 1.
Logic symbol
Fig. 2.
Logic diagram
5. Pinning information
5.1. Pinning
74CBTLVD3245-Q100
terminal 1
index area
A1
A2
A3
2
3
4
5
6
7
8
9
GND 10
B8 11
GND
(1)
20 V
CC
19 OE
18 B1
17 B2
16 B3
15 B4
14 B5
13 B6
12 B7
n.c.
1
74CBTLVD3245-Q100
n.c.
A1
A2
A3
A4
A5
A6
A7
A8
1
2
3
4
5
6
7
8
9
20 V
CC
19 OE
18 B1
17 B2
16 B3
15 B4
14 B5
13 B6
12 B7
11 B8
aaa-020100
A4
A5
A6
A7
A8
aaa-020101
Transparent top view
GND 10
(1) This is not a ground pin. There is no electrical or
mechanical requirement to solder the pad. In case
soldered, the solder land should remain floating or
connected to GND.
Fig. 4.
Pin configuration SOT764-1 (DHVQFN20)
Fig. 3.
Pin configuration SOT360-1 (TSSOP20)
5.2. Pin description
Table 2. Pin description
Symbol
n.c.
A1 to A8
GND
B1 to B8
OE
V
CC
Pin
1
2, 3, 4, 5, 6, 7, 8, 9
10
18, 17, 16, 15, 14, 13, 12, 11
19
20
Description
not connected
data input/output (A port)
ground (0 V)
data input/output (B port)
output enable input (active LOW)
positive supply voltage
74CBTLVD3245_Q100
All information provided in this document is subject to legal disclaimers.
©
Nexperia B.V. 2020. All rights reserved
Product data sheet
Rev. 4 — 30 September 2020
2 / 14
Nexperia
74CBTLVD3245-Q100
8-bit level-shifting bus switch with output enable
6. Functional description
Table 3. Function selection
H = HIGH voltage level; L = LOW voltage level; Z = high-impedance OFF-state.
Input
OE
L
H
Input/output
An, Bn
An = Bn
Z
7. Limiting values
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol Parameter
V
CC
V
I
V
SW
I
IK
I
SK
I
SW
I
CC
I
GND
T
stg
P
tot
[1]
[2]
Conditions
[1]
enable and disable mode
V
I/O
< -0.5 V
V
I
< -0.5 V
V
SW
= 0 V to V
CC
[1]
Min
-0.5
-0.5
-0.5
-50
-50
-
-
-100
-65
Max
+4.6
+4.6
-
-
±128
+100
-
+150
500
Unit
V
V
mA
mA
mA
mA
mA
°C
mW
supply voltage
input voltage
switch voltage
input clamping current
switch clamping current
switch current
supply current
ground current
storage temperature
total power dissipation
T
amb
= -40 °C to +125 °C
[2]
V
CC
+ 0.5 V
-
The minimum input and output voltage ratings may be exceeded if the input and output current ratings are observed.
For SOT360-1 (TSSOP20) package: P
tot
derates linearly with 10.0 mW/K above 100 °C.
For SOT764-1 (DHVQFN20) package: P
tot
derates linearly with 12.9 mW/K above 111 °C.
8. Recommended operating conditions
Table 5. Recommended operating conditions
Symbol Parameter
V
CC
V
I
V
SW
T
amb
Δt/ΔV
[1]
Conditions
Min
3.0
0
Max
3.6
3.6
V
CC
+125
200
Unit
V
V
V
°C
ns/V
supply voltage
input voltage
switch voltage
ambient temperature
input transition rise and fall rate
V
CC
= 3.0 V to 3.6 V
[1]
enable and disable mode
0
-40
0
Applies to control signal levels.
74CBTLVD3245_Q100
All information provided in this document is subject to legal disclaimers.
©
Nexperia B.V. 2020. All rights reserved
Product data sheet
Rev. 4 — 30 September 2020
3 / 14
Nexperia
74CBTLVD3245-Q100
8-bit level-shifting bus switch with output enable
9. Static characteristics
Table 6. Static characteristics
At recommended operating conditions voltages are referenced to GND (ground = 0 V).
Symbol Parameter
V
IH
V
IL
I
I
V
pass
I
S(OFF)
I
S(ON)
I
OFF
I
CC
HIGH-level
input voltage
Conditions
V
CC
= 3.0 V to 3.6 V
-40 °C to +85 °C
Min
2.0
-
-
-
-
-
-
-
-
[2]
-
-
-
-
Typ
[1]
-
-
-
-
-
-
-
-
-
-
0.9
2.5
9.0
Max
-
0.9
±1
-
±1
±1
±10
20
100
300
-
-
-
-40 °C to +125 °C Unit
Min
2.0
-
-
-
-
-
-
-
-
-
-
-
-
Max
-
0.9
±20
-
±20
±20
±50
50
150
2000
-
-
-
V
V
μA
V
μA
μA
μA
μA
μA
μA
pF
pF
pF
LOW-level input V
CC
= 3.0 V to 3.6 V
voltage
input leakage
current
pass voltage
pin OE; V
I
= GND to V
CC
; V
CC
= 3.6 V
V
I
= V
CC
; see
Fig. 7
to
Fig. 11
OFF-state
V
CC
= 3.6 V; see
Fig. 5
leakage current
ON-state
V
CC
= 3.6 V; see
Fig. 6
leakage current
power-off
V
I
or V
O
= 0 V to 3.6 V; V
CC
= 0 V
leakage current
supply current
V
I
= V
CC
; I
O
= 0 A; V
CC
= 3.6 V;
V
SW
= GND or V
CC
V
I
= GND; I
O
= 0 A; V
CC
= 3.6 V;
V
SW
= GND or V
CC
ΔI
CC
C
I
C
S(OFF)
C
S(ON)
[1]
[2]
additional
supply current
input
capacitance
OFF-state
capacitance
ON-state
capacitance
pin OE; V
I
= V
CC
- 0.6 V;
V
SW
= GND or V
CC
; V
CC
= 3.6 V
pin OE; V
CC
= 3.3 V; V
I
= 0 V to 3.3 V
V
CC
= 3.3 V; V
I
= 0 V to 3.3 V
V
CC
= 3.3 V; V
I
= 0 V to 3.3 V
All typical values are measured at T
amb
= 25 °C.
One input at 3 V, other inputs at V
CC
or GND.
9.1. Test circuits
V
CC
V
IH
OE
Is
V
CC
V
IL
OE
Is
A
VI
Bn
GND
An
Is
A
VO
VI
A
An
GND
Bn
VO
001aan147
001aan148
V
I
= V
CC
or GND and V
O
= GND or V
CC
.
Fig. 5.
Test circuit for measuring OFF-state leakage
current (one switch)
Fig. 6.
V
I
= V
CC
or GND and V
O
= open circuit.
Test circuit for measuring ON-state leakage
current (one switch)
74CBTLVD3245_Q100
All information provided in this document is subject to legal disclaimers.
©
Nexperia B.V. 2020. All rights reserved
Product data sheet
Rev. 4 — 30 September 2020
4 / 14
Nexperia
74CBTLVD3245-Q100
8-bit level-shifting bus switch with output enable
9.2. Typical pass voltage graphs
V
pass
(V)
1.85
1.80
1.75
1.70
1.65
1.60
1.55
3.0
2 mA
4 mA
1.90
20 µA
001aam102
V
pass
(V)
1.85
1.80
1.75
1.70
1.65
1.60
1.55
3.0
1.90
001aam103
20 µA
100 µA
100 µA
2 mA
4 mA
3.2
3.4
V
CC
(V)
3.6
3.2
3.4
V
CC
(V)
3.6
Fig. 7.
Pass voltage versus supply voltage;
T
amb
= 125 °C (typical)
001aam104
Fig. 8.
Pass voltage versus supply voltage;
T
amb
= 85 °C (typical)
001aam105
V
pass
(V)
1.85
1.80
1.75
1.70
1.65
1.60
1.55
3.0
1.90
20 µA
100 µA
V
pass
(V)
1.85
20 µA
1.80
1.75
100 µA
1.90
2 mA
4 mA
1.70
1.65
1.60
1.55
3.0
2 mA
4 mA
3.2
3.4
V
CC
(V)
3.6
3.2
3.4
V
CC
(V)
3.6
Fig. 9.
Pass voltage versus supply voltage;
T
amb
= 25 °C (typical)
Fig. 10. Pass voltage versus supply voltage;
T
amb
= 0 °C (typical)
74CBTLVD3245_Q100
All information provided in this document is subject to legal disclaimers.
©
Nexperia B.V. 2020. All rights reserved
Product data sheet
Rev. 4 — 30 September 2020
5 / 14
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