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IDT74ALVCH32245BF

产品描述Bus Transceiver, ALVC/VCX/A Series, 4-Func, 8-Bit, True Output, CMOS, PBGA96, LFBGA-96
产品类别逻辑   
文件大小171KB,共7页
制造商IDT (Integrated Device Technology)
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IDT74ALVCH32245BF概述

Bus Transceiver, ALVC/VCX/A Series, 4-Func, 8-Bit, True Output, CMOS, PBGA96, LFBGA-96

IDT74ALVCH32245BF规格参数

参数名称属性值
是否无铅含铅
是否Rohs认证不符合
厂商名称IDT (Integrated Device Technology)
零件包装代码BGA
包装说明LFBGA, BGA96,6X16,32
针数96
Reach Compliance Codenot_compliant
ECCN代码EAR99
其他特性WITH DIRECTION CONTROL
控制类型COMMON CONTROL
计数方向BIDIRECTIONAL
系列ALVC/VCX/A
JESD-30 代码R-PBGA-B96
JESD-609代码e0
长度13.5 mm
逻辑集成电路类型BUS TRANSCEIVER
最大I(ol)0.024 A
湿度敏感等级3
位数8
功能数量4
端口数量2
端子数量96
最高工作温度85 °C
最低工作温度-40 °C
输出特性3-STATE
输出极性TRUE
封装主体材料PLASTIC/EPOXY
封装代码LFBGA
封装等效代码BGA96,6X16,32
封装形状RECTANGULAR
封装形式GRID ARRAY, LOW PROFILE, FINE PITCH
峰值回流温度(摄氏度)225
电源3.3 V
Prop。Delay @ Nom-Sup3 ns
传播延迟(tpd)3.6 ns
认证状态Not Qualified
座面最大高度1.5 mm
最大供电电压 (Vsup)3.6 V
最小供电电压 (Vsup)2.7 V
标称供电电压 (Vsup)3.3 V
表面贴装YES
技术CMOS
温度等级INDUSTRIAL
端子面层Tin/Lead (Sn63Pb37)
端子形式BALL
端子节距0.8 mm
端子位置BOTTOM
处于峰值回流温度下的最长时间20
翻译N/A
宽度5.5 mm
Base Number Matches1

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IDT74ALVCH32245
3.3V CMOS 32-BIT BUS TRANSCEIVER W/ 3-STATE OUTPUTS
EXTENDED COMMERCIAL TEMPERATURE RANGE
3.3V CMOS 32-BIT
BUS TRANSCEIVER
WITH 3-STATE OUTPUTS
AND BUS-HOLD
FEATURES:
0.5 MICRON CMOS Technology
Typical t
SK
(o) (Output Skew) < 250ps
ESD > 2000V per MIL-STD-883, Method 3015;
> 200V using machine model (C = 200pF, R = 0)
0.8mm pitch LFBGA package, 96 balls
Extended commercial range of -40°C to +85°C
V
CC
= 3.3V ± 0.3V, Normal Range
V
CC
= 2.7V to 3.6V, Extended Range
V
CC
= 2.5V ± 0.2V
CMOS power levels (0.4µ W typ. static)
Rail-to-Rail output swing for increased noise margin
IDT74ALVCH32245
DESCRIPTION:
This 32-bit bus transceiver is built using advanced dual metal CMOS
technology. This high-speed, low power transceiver is ideal for asynchro-
nous communication between two busses (A and B). The Direction and
Output Enable controls are designed to operate the device as either four
independent 8-bit transceivers or one 32-bit transceiver. The direction
control pins (DIR) control the direction of data flow. The output enable pins
(OE) override the direction control and disable both ports. All inputs are
designed with hysteresis for improved noise margin.
The ALVCH32245 has been designed with a ±24mA output driver. This
driver is capable of driving a moderate to heavy load while maintaining
speed performance.
The ALVCH32245 has “bus-hold” which retains the inputs’ last state
whenever the input bus goes to a high impedance. This prevents floating
inputs and eliminates the need for pull-up/down resistors.
Drive Features for ALVCH32245:
– High Output Drivers: ±24mA
– Suitable for heavy loads
APPLICATIONS:
• 3.3V High Speed Systems
• 3.3V and lower voltage computing systems
FUNCTIONAL BLOCK DIAGRAM
A3
A4
J3
1
DIR
3
DIR
1
OE
J4
3
OE
3
A
1
J5
J2
1
A
1
A5
A2
1
B
1
3
B
1
TO SEVEN OTHER CHANNELS
TO SEVEN OTHER CHANNELS
2
DIR
H3
4
DIR
H4
T3
T4
2
OE
2
A
1
E5
E2
4
OE
4
A
1
N5
N2
2
B
1
4
B
1
TO SEVEN OTHER CHANNELS
TO SEVEN OTHER CHANNELS
EXTENDED COMMERCIAL TEMPERATURE RANGE
1
c
1999 Integrated Device Technology, Inc.
FEBRUARY 2000
DSC-4907/-
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