54LVTH162245
16-Bit Bus Transceivers with
3-State Outputs
/
/
/
/
Memory
Logic Diagram
F
EATURES
:
• A-Port outputs have equivalent 22-
Ω
series resistors, so
no external resistors are required
• Support mixed-mode signal operation (5V input and output
voltages with 3.3V V
CC
)
• Support unregulated battery operation down to 2.7V
• Typical V
OLP
(output ground bounce) < 0.8V at V
CC
= 3.3V,
T
A
= 25
°
C
• I
OFF
and power-up 3-state support hot insertion
• Bus hold on data inputs eliminates the need for external
pullup/pulldown resistors
• Distributed V
CC
and GND pin configuration minimizes high-
speed switching noise
• Flow-through architecture optimizes PCB layout
• Total dose hardness:
- > 100 krad (Si), depending upon space mission
• Package: 48 pin R
AD
-P
AK
® flat pack
D
ESCRIPTION
:
Maxwell Technologies’ 54LVTH162245 devices are 16-bit
(dual-octal) non-inverting 3-state transceivers designed for
low-voltage (3.3V) V
CC
operation, but with the capability to
provide a TTL interface to a 5V system environment. These
devices can be used as two 8-bit transceivers or one 16-bit
transceiver. The devices allow data transmission from the A
bus to the B bus or form the B bus to the A bus, depending on
the logic level at the direction-control (DIR) input. The output
enable (OE) input can be used to disable the device so that
the buses are effectively isolated. The A-port outputs, which
are designed to source or sink up to 12 mA, include equivalent
22-
Ω
series resistors to reduce overshoot and undershoot.
Maxwell Technologies' patented R
AD
-P
AK
® packaging technol-
ogy incorporates radiation shielding in the microcircuit pack-
age. It eliminates the need for box shielding while providing
the required radiation shielding for a lifetime in orbit or space
mission. In a GEO orbit, R
AD
-P
AK
provides greater than 100
krad (Si) radiation dose tolerance. This product is available
with screening up to Class S.
11.15.02 Rev 2
All data sheets are subject to change without notice
1
(858) 503-3300 - Fax: (858) 503-3301 - www.maxwell.com
©2002 Maxwell Technologies
All rights reserved.
16-Bit Bus Transceivers with 3-State Outputs
.
54LVTH162245
T
ABLE
1. P
INOUT
D
ESCRIPTION
P
IN
1, 24
2, 3, 5, 6, 8, 9, 11, 12
4, 10, 15, 21, 28, 34, 39, 45
7, 18, 31, 42
13, 14, 16, 17, 19, 20, 22, 23
25, 48
26, 27, 29, 30, 32, 33, 35, 36
37, 38, 40, 41, 43, 44, 46, 47
S
YMBOL
1DIR - 2DIR
1B1 - 1B8
GND
V
CC
2B - 2B8
2OE - 1OE
2A8 - 2A1
1A8 - 1A1
D
ESCRIPTION
Direction Control
Output
Ground
Supply Voltage
Output
Output Enable
Input
Input
T
ABLE
2. 54LVTH162245 A
BSOLUTE
M
AXIMUM
R
ATINGS 1
P
ARAMETER
Supply voltage range
Input voltage range
2
Voltage range applied to any output in the high-impedance or
power-off state
2
Voltage range applied to any output in the high state
2
Current into any output in the low state
B Port
A Port
Current into any output in the high state
3
B Port
A Port
Input clamp current
Output clamp current
Thermal resistance
Operating temperature range
Storage temperature range
Power Dissipation
S
YMBOL
V
CC
V
I
V
O
V
O
I
O
--
--
I
O
--
--
I
IK
(V
I
< 0)
I
OK
(V
O
< 0)
-50
-50
--
-55
-65
--
48
30
--
--
5
125
150
1
mA
mA
°
C/W
Memory
M
IN
-0.5
-0.5
-0.5
-0.5
M
AX
4.6
7
7
V
CC
+ 0.5
96
30
U
NIT
V
V
V
V
mA
mA
Θ
JC
T
A
T
S
PD
°C
°
C
W
1. Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are
stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “rec-
ommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may
affect device reliability.
2. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
3. This current flows only when the output is in the high state and V
O
> V
CC
.
11.15.02 Rev 2
All data sheets are subject to change without notice
2
©2002 Maxwell Technologies
All rights reserved.
16-Bit Bus Transceivers with 3-State Outputs
T
ABLE
3. D
ELTA
L
IMITS
P
ARAMETER
I
CC(OL)
I
CC(OH)
I
CC(OD)
V
ARIATION
54LVTH162245
±10% of specified value in Table 5
±10% of specified value in Table 5
±10% of specified value in Table 5
T
ABLE
4. 54LVTH162245 R
ECOMMENDED
O
PERATING
C
ONDITIONS 1
P
ARAMETER
Supply voltage
High-level input voltage
Low-level input voltage
Input voltage
High-level output current
Low-level output current
Input transition rise or fall rate
Power-up ramp rate
Operating temperature
A port
B port
A port
B port
Outputs
enabled
I
OL
S
YMBOL
V
CC
V
IH
V
IL
V
I
I
OH
M
IN
2.7
2
--
--
--
--
--
--
--
200
-55
M
AX
3.6
--
0.8
5.5
-12
-24
12
48
10
--
125
ns/V
µ s/V
°
C
U
NIT
V
V
V
V
mA
mA
Memory
∆
t/
∆
v
∆
t/
∆
V
CC
T
A
1. All unused control inputs of the device must be held at high or low ensure proper device operation.
T
ABLE
5. 54LVTH162245 DC E
LECTRICAL
C
HARACTERISTICS
(V
CC
= 3.3V ±10%, T
A
= -55
TO
+125
°
C,
UNLESS OTHERWISE SPECIFIED
)
P
ARAMETER
Input Clamp Voltage
High-Level Output
Voltage
S
YMBOL
V
IK
V
OH
V
CC
= 2.7
V
CC
= 2.7V to
3.6V
V
CC
= 3V
V
CC
= 2.7V to
3.6V
V
CC
= 2.7V
V
CC
= 3V,
T
EST
C
ONDITIONS
I
I
= -18 mA
I
OH
= -100 µ A
I
OH
= -12 mA
I
OH
= -100 µ A
I
OH
= -8 mA
I
OH
= -24 mA
B Port
1, 2, 3
A Port
S
UBGROUPS
1, 2, 3
1, 2, 3
M
IN
--
V
CC
-0.2
2
V
CC
-0.2
2.4
2
M
AX
-1.2
--
--
--
U
NIT
V
V
11.15.02 Rev 2
All data sheets are subject to change without notice
3
©2002 Maxwell Technologies
All rights reserved.
16-Bit Bus Transceivers with 3-State Outputs
54LVTH162245
S
UBGROUPS
M
IN
--
--
M
AX
0.2
0.8
0.2
0.5
0.4
0.5
0.55
U
NIT
V
T
ABLE
5. 54LVTH162245 DC E
LECTRICAL
C
HARACTERISTICS
(V
CC
= 3.3V ±10%, T
A
= -55
TO
+125
°
C,
UNLESS OTHERWISE SPECIFIED
)
P
ARAMETER
Low-Level Output
Voltage
S
YMBOL
V
OL
V
CC
= 2.7V to
3.6V
V
CC
= 3V
V
CC
= 2.7V
V
CC
= 3V
T
EST
C
ONDITIONS
I
OL
= 100 µ A
I
OL
= 12 mA
I
OL
= 100 µ A
I
OL
= 24 mA
I
OL
= 16 mA
I
OL
= 32 mA
I
OL
= 48 mA
Input Current
I
I
V
CC
= 3.6V
V
CC
= 0 or
3.6V
V
CC
= 3.6V
VI = VCC or GND
V
I
= 5.5V
V
I
= 5.5V
V
I
= V
CC
V
I
= 0
Hold Current
Power Up Current
Power Down Current
Supply Current
I
I(HOLD)
V
CC
= 3V
I
OZPU2
I
OZPD2
I
CC
V
I
= 0.8V
V
I
= 2V
V
CC
= 0 to 1.5V, V
O
= 0.5V to 3V, OE = don’t care
V
CC
= 1.5V to 0, V
O
= 0.5V to 3V, OE = don’t care
V
CC
= 3.6V
I
O
= 0
V
I
= V
CC
or GND
Delta Supply Current
Input Capacitance
Input Output Capaci-
tance
Outputs
high
Outputs
low
Outputs
disabled
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
A Inputs
1, 2, 3
Control
inputs
A or B
Ports
1, 2, 3
--
--
1, 2, 3
--
--
75
-75
--
--
--
--
--
--
--
--
B Port
1, 2, 3
A Port
1, 2, 3
--
--
--
±1
10
20
5
-10
--
--
±100
±100
0.19
5
0.19
0.3
8
15
µA
Memory
µA
µA
µA
mA
∆
I
CC 1
V
CC
= 3V to 3.6V, One input at V
CC
-0.6V, Other
inputs at V
CC
or GND
C
I2
C
O2
V
I
= 3V or 0
V
O
= 3V or 0
mA
pF
pF
1. This is the increase in supply current for each input that is at the specified TTL voltage level rather than V
CC
or GND.
2. Guaranteed by design.
11.15.02 Rev 2
All data sheets are subject to change without notice
4
©2002 Maxwell Technologies
All rights reserved.
16-Bit Bus Transceivers with 3-State Outputs
54LVTH162245
T
ABLE
6. 54LVTH162245 AC E
LECTRICAL
C
HARACTERISTICS
(V
CC
= 3.3V ±10%, T
A
= -55
TO
+125
°
C,
UNLESS OTHERWISE SPECIFIED
)
S
YMBOL
P
ARAMETER
Propagation Delay Time
A to B
Propagation Delay Time
B to A
Output Enable Time
OE to B
Output Enable Time
OE to A
Output Disable Time
OE to B
Output Disable Time
OE to A
Output Skew
t
PLH
t
PHL
t
PLH
t
PHL
t
PZH
t
PZL
t
PZH
t
PZL
t
PHZ
t
PLZ
t
PHZ
t
PLZ
t
sk(o)
S
UBGROUPS
M
IN
9, 10, 11
9, 10, 11
9, 10, 11
9, 10, 11
9, 10, 11
9, 10, 11
9, 10, 11
9, 10, 11
9, 10, 11
9, 10, 11
9, 10, 11
9, 10, 11
9, 10, 11
1
1
1
1
1
1
1
1
1
1
1
1
--
M
AX
3.5
3.5
4.3
4.2
4.8
4.8
5.5
5.4
5.5
5.5
5.8
6.3
--
M
IN
--
--
--
--
--
--
--
--
--
--
--
--
--
M
AX
4
3.9
5.3
4.5
5.9
5.5
7.2
6.4
5.8
5.8
6.5
6.3
--
ns
ns
ns
ns
ns
ns
ns
V
CC
= 3.3V ± 0.3
V
CC
= 2.7V
U
NIT
Memory
T
ABLE
7. F
UNTION
T
ABLE
(
EACH
8-
BIT SECTION
)
INPUTS
OE
L
l
H
DIR
L
H
X
B data to A bus
A data to B bus
Isolation
OPERATION
11.15.02 Rev 2
All data sheets are subject to change without notice
5
©2002 Maxwell Technologies
All rights reserved.
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