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IDT71V2558SA166BQI

产品描述ZBT SRAM, 256KX18, 3.5ns, CMOS, PBGA165, 13 X 15 MM, FBGA-165
产品类别存储   
文件大小1008KB,共28页
制造商IDT (Integrated Device Technology)
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IDT71V2558SA166BQI概述

ZBT SRAM, 256KX18, 3.5ns, CMOS, PBGA165, 13 X 15 MM, FBGA-165

IDT71V2558SA166BQI规格参数

参数名称属性值
是否无铅含铅
是否Rohs认证不符合
厂商名称IDT (Integrated Device Technology)
零件包装代码BGA
包装说明13 X 15 MM, FBGA-165
针数165
Reach Compliance Codenot_compliant
ECCN代码3A991.B.2.A
最长访问时间3.5 ns
其他特性PIPELINED ARCHITECTURE
最大时钟频率 (fCLK)166 MHz
I/O 类型COMMON
JESD-30 代码R-PBGA-B165
JESD-609代码e0
长度15 mm
内存密度4718592 bit
内存集成电路类型ZBT SRAM
内存宽度18
湿度敏感等级3
功能数量1
端子数量165
字数262144 words
字数代码256000
工作模式SYNCHRONOUS
最高工作温度85 °C
最低工作温度-40 °C
组织256KX18
输出特性3-STATE
封装主体材料PLASTIC/EPOXY
封装代码TBGA
封装等效代码BGA165,11X15,40
封装形状RECTANGULAR
封装形式GRID ARRAY, THIN PROFILE
并行/串行PARALLEL
峰值回流温度(摄氏度)225
电源2.5,3.3 V
认证状态Not Qualified
座面最大高度1.2 mm
最大待机电流0.045 A
最小待机电流3.14 V
最大压摆率0.36 mA
最大供电电压 (Vsup)3.465 V
最小供电电压 (Vsup)3.135 V
标称供电电压 (Vsup)3.3 V
表面贴装YES
技术CMOS
温度等级INDUSTRIAL
端子面层Tin/Lead (Sn63Pb37)
端子形式BALL
端子节距1 mm
端子位置BOTTOM
处于峰值回流温度下的最长时间20
宽度13 mm
Base Number Matches1

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128K x 36, 256K x 18
3.3V Synchronous ZBT™ SRAMs
2.5V I/O, Burst Counter
Pipelined Outputs
x
x
IDT71V2556S
IDT71V2558S
IDT71V2556SA
IDT71V2558SA
Features
128K x 36, 256K x 18 memory configurations
Supports high performance system speed - 200 MHz
(3.2 ns Clock-to-Data Access)
ZBT
TM
Feature - No dead cycles between write and read
cycles
Internally synchronized output buffer enable eliminates the
need to control
OE
Single R/W (READ/WRITE) control pin
W
Positive clock-edge triggered address, data, and control
signal registers for fully pipelined applications
4-word burst capability (interleaved or linear)
BW
Individual byte write (BW
1
-
BW
4
) control (May tie active)
Three chip enables for simple depth expansion
3.3V power supply (±5%), 2.5V I/O Supply (V
DDQ)
Optional - Boundary Scan JTAG Interface (IEEE 1149.1
complaint)
Packaged in a JEDEC standard 100-pin plastic thin quad
flatpack (TQFP), 119 ball grid array (BGA) and 165 fine pitch
ball grid array (fBGA)
x
x
x
x
x
x
x
x
x
x
Description
The IDT71V2556/58 are 3.3V high-speed 4,718,592-bit (4.5 Mega-
bit) synchronous SRAMS. They are designed to eliminate dead bus cycles
when turning the bus around between reads and writes, or writes and
reads. Thus, they have been given the name ZBT
TM
, or Zero Bus
Turnaround.
Address and control signals are applied to the SRAM during one clock
cycle, and two cycles later the associated data cycle occurs, be it read
or write.
The IDT71V2556/58 contain data I/O, address and control signal
registers. Output enable is the only asynchronous signal and can be used
to disable the outputs at any given time.
A Clock Enable (CEN) pin allows operation of the IDT71V2556/58 to
be suspended as long as necessary. All synchronous inputs are ignored
when (CEN) is high and the internal device registers will hold their previous
values.
There are three chip enable pins (CE
1
, CE
2
,
CE
2
) that allow the user
to deselect the device when desired. If any one of these three are not
asserted when ADV/LD is low, no new memory operation can be initiated.
However, any pending data transfers (reads or writes) will be completed.
The data bus will tri-state two cycles after chip is deselected or a write is
initiated.
The IDT71V2556/58 has an on-chip burst counter. In the burst mode,
the IDT71V2556/58 can provide four cycles of data for a single address
presented to the SRAM. The order of the burst sequence is defined by the
LBO
input pin. The
LBO
pin selects between linear and interleaved burst
sequence. The ADV/LD signal is used to load a new external address
(ADV/LD = LOW) or increment the internal burst counter (ADV/LD =
HIGH).
The IDT71V2556/58 SRAMs utilize IDT's latest high-performance
CMOS process and are packaged in a JEDEC standard 14mm x 20mm
100-pin thin plastic quad flatpack (TQFP) as well as a 119 ball grid array
(BGA) and a 165 fine pitch ball grid array (fBGA).
Pin Description Summary
A
0
-A
17
Address Inputs
Chip Enables
Output Enable
Read/Write Signal
Clock Enable
Individual Byte Write Selects
Clock
Advance burst address / Load new address
Linear / Interleaved Burst Order
Test Mode Select
Test Data Input
Test Clock
Test Data Output
JTAG Reset (Optional)
Sleep Mode
Data Input / Output
Core Power, I/O Power
Ground
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Output
Input
Input
I/O
Supply
Supply
Synchronous
Synchronous
Asynchronous
Synchronous
Synchronous
Synchronous
N/A
Synchronous
Static
Synchronous
Synchronous
N/A
Synchronous
Asynchronous
Synchronous
Synchronous
Static
Static
CE
1
, CE
2
,
CE
2
OE
R/
W
CEN
BW
1
,
BW
2
,
BW
3
,
BW
4
CLK
ADV/
LD
LBO
TMS
TDI
TCK
TDO
TRST
ZZ
I/O
0
-I/O
31
, I/O
P1
-I/O
P4
V
DD
, V
DDQ
V
SS
1
©2004 Integrated Device Technology, Inc.
OCTOBER 2004
DSC-4875/08
4875 tbl 01

IDT71V2558SA166BQI相似产品对比

IDT71V2558SA166BQI IDT71V2558SA100BGI IDT71V2558SA200BQ IDT71V2558SA100BQ IDT71V2558SA100BQI IDT71V2556SA166BGI IDT71V2558SA166BQ IDT71V2558SA133BQ IDT71V2558S166BQ IDT71V2556SA166BQI
描述 ZBT SRAM, 256KX18, 3.5ns, CMOS, PBGA165, 13 X 15 MM, FBGA-165 ZBT SRAM, 256KX18, 5ns, CMOS, PBGA119, 14 X 22 MM, PLASTIC, MS-028AA, BGA-119 ZBT SRAM, 256KX18, 3.2ns, CMOS, PBGA165, 13 X 15 MM, FBGA-165 ZBT SRAM, 256KX18, 5ns, CMOS, PBGA165, 13 X 15 MM, FBGA-165 ZBT SRAM, 256KX18, 5ns, CMOS, PBGA165, 13 X 15 MM, FBGA-165 ZBT SRAM, 128KX36, 3.5ns, CMOS, PBGA119, 14 X 22 MM, PLASTIC, MS-028AA, BGA-119 ZBT SRAM, 256KX18, 3.5ns, CMOS, PBGA165, 13 X 15 MM, FBGA-165 ZBT SRAM, 256KX18, 4.2ns, CMOS, PBGA165, 13 X 15 MM, FBGA-165 ZBT SRAM, 256KX18, 3.5ns, CMOS, PBGA165, 13 X 15 MM, FBGA-165 ZBT SRAM, 128KX36, 3.5ns, CMOS, PBGA165, 13 X 15 MM, FBGA-165
是否Rohs认证 不符合 不符合 不符合 不符合 不符合 不符合 不符合 不符合 不符合 不符合
厂商名称 IDT (Integrated Device Technology) IDT (Integrated Device Technology) IDT (Integrated Device Technology) IDT (Integrated Device Technology) IDT (Integrated Device Technology) IDT (Integrated Device Technology) IDT (Integrated Device Technology) IDT (Integrated Device Technology) IDT (Integrated Device Technology) IDT (Integrated Device Technology)
零件包装代码 BGA BGA BGA BGA BGA BGA BGA BGA BGA BGA
包装说明 13 X 15 MM, FBGA-165 14 X 22 MM, PLASTIC, MS-028AA, BGA-119 13 X 15 MM, FBGA-165 13 X 15 MM, FBGA-165 13 X 15 MM, FBGA-165 BGA, BGA119,7X17,50 13 X 15 MM, FBGA-165 13 X 15 MM, FBGA-165 13 X 15 MM, FBGA-165 13 X 15 MM, FBGA-165
针数 165 119 165 165 165 119 165 165 165 165
Reach Compliance Code not_compliant not_compliant not_compliant not_compliant not_compliant not_compliant not_compliant not_compliant not_compliant not_compliant
ECCN代码 3A991.B.2.A 3A991.B.2.A 3A991.B.2.A 3A991.B.2.A 3A991.B.2.A 3A991.B.2.A 3A991.B.2.A 3A991.B.2.A 3A991.B.2.A 3A991.B.2.A
最长访问时间 3.5 ns 5 ns 3.2 ns 5 ns 5 ns 3.5 ns 3.5 ns 4.2 ns 3.5 ns 3.5 ns
其他特性 PIPELINED ARCHITECTURE PIPELINED ARCHITECTURE PIPELINED ARCHITECTURE PIPELINED ARCHITECTURE PIPELINED ARCHITECTURE PIPELINED ARCHITECTURE PIPELINED ARCHITECTURE PIPELINED ARCHITECTURE PIPELINED ARCHITECTURE PIPELINED ARCHITECTURE
最大时钟频率 (fCLK) 166 MHz 100 MHz 200 MHz 100 MHz 100 MHz 166 MHz 166 MHz 133 MHz 166 MHz 166 MHz
I/O 类型 COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON
JESD-30 代码 R-PBGA-B165 R-PBGA-B119 R-PBGA-B165 R-PBGA-B165 R-PBGA-B165 R-PBGA-B119 R-PBGA-B165 R-PBGA-B165 R-PBGA-B165 R-PBGA-B165
JESD-609代码 e0 e0 e0 e0 e0 e0 e0 e0 e0 e0
长度 15 mm 22 mm 15 mm 15 mm 15 mm 22 mm 15 mm 15 mm 15 mm 15 mm
内存密度 4718592 bit 4718592 bit 4718592 bit 4718592 bit 4718592 bit 4718592 bit 4718592 bit 4718592 bit 4718592 bit 4718592 bit
内存集成电路类型 ZBT SRAM ZBT SRAM ZBT SRAM ZBT SRAM ZBT SRAM ZBT SRAM ZBT SRAM ZBT SRAM ZBT SRAM ZBT SRAM
内存宽度 18 18 18 18 18 36 18 18 18 36
湿度敏感等级 3 3 3 3 3 3 3 3 3 3
功能数量 1 1 1 1 1 1 1 1 1 1
端子数量 165 119 165 165 165 119 165 165 165 165
字数 262144 words 262144 words 262144 words 262144 words 262144 words 131072 words 262144 words 262144 words 262144 words 131072 words
字数代码 256000 256000 256000 256000 256000 128000 256000 256000 256000 128000
工作模式 SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS
最高工作温度 85 °C 85 °C 70 °C 70 °C 85 °C 85 °C 70 °C 70 °C 70 °C 85 °C
组织 256KX18 256KX18 256KX18 256KX18 256KX18 128KX36 256KX18 256KX18 256KX18 128KX36
输出特性 3-STATE 3-STATE 3-STATE 3-STATE 3-STATE 3-STATE 3-STATE 3-STATE 3-STATE 3-STATE
封装主体材料 PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
封装代码 TBGA BGA TBGA TBGA TBGA BGA TBGA TBGA TBGA TBGA
封装等效代码 BGA165,11X15,40 BGA119,7X17,50 BGA165,11X15,40 BGA165,11X15,40 BGA165,11X15,40 BGA119,7X17,50 BGA165,11X15,40 BGA165,11X15,40 BGA165,11X15,40 BGA165,11X15,40
封装形状 RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR
封装形式 GRID ARRAY, THIN PROFILE GRID ARRAY GRID ARRAY, THIN PROFILE GRID ARRAY, THIN PROFILE GRID ARRAY, THIN PROFILE GRID ARRAY GRID ARRAY, THIN PROFILE GRID ARRAY, THIN PROFILE GRID ARRAY, THIN PROFILE GRID ARRAY, THIN PROFILE
并行/串行 PARALLEL PARALLEL PARALLEL PARALLEL PARALLEL PARALLEL PARALLEL PARALLEL PARALLEL PARALLEL
峰值回流温度(摄氏度) 225 225 225 225 225 225 225 225 225 225
电源 2.5,3.3 V 2.5,3.3 V 2.5,3.3 V 2.5,3.3 V 2.5,3.3 V 2.5,3.3 V 2.5,3.3 V 2.5,3.3 V 2.5,3.3 V 2.5,3.3 V
认证状态 Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified
座面最大高度 1.2 mm 2.36 mm 1.2 mm 1.2 mm 1.2 mm 2.36 mm 1.2 mm 1.2 mm 1.2 mm 1.2 mm
最大待机电流 0.045 A 0.045 A 0.04 A 0.04 A 0.045 A 0.045 A 0.04 A 0.04 A 0.04 A 0.045 A
最小待机电流 3.14 V 3.14 V 3.14 V 3.14 V 3.14 V 3.14 V 3.14 V 3.14 V 3.14 V 3.14 V
最大压摆率 0.36 mA 0.26 mA 0.4 mA 0.25 mA 0.26 mA 0.36 mA 0.35 mA 0.3 mA 0.35 mA 0.36 mA
最大供电电压 (Vsup) 3.465 V 3.465 V 3.465 V 3.465 V 3.465 V 3.465 V 3.465 V 3.465 V 3.465 V 3.465 V
最小供电电压 (Vsup) 3.135 V 3.135 V 3.135 V 3.135 V 3.135 V 3.135 V 3.135 V 3.135 V 3.135 V 3.135 V
标称供电电压 (Vsup) 3.3 V 3.3 V 3.3 V 3.3 V 3.3 V 3.3 V 3.3 V 3.3 V 3.3 V 3.3 V
表面贴装 YES YES YES YES YES YES YES YES YES YES
技术 CMOS CMOS CMOS CMOS CMOS CMOS CMOS CMOS CMOS CMOS
温度等级 INDUSTRIAL INDUSTRIAL COMMERCIAL COMMERCIAL INDUSTRIAL INDUSTRIAL COMMERCIAL COMMERCIAL COMMERCIAL INDUSTRIAL
端子面层 Tin/Lead (Sn63Pb37) Tin/Lead (Sn63Pb37) Tin/Lead (Sn63Pb37) Tin/Lead (Sn63Pb37) Tin/Lead (Sn63Pb37) Tin/Lead (Sn63Pb37) Tin/Lead (Sn63Pb37) Tin/Lead (Sn63Pb37) Tin/Lead (Sn63Pb37) Tin/Lead (Sn63Pb37)
端子形式 BALL BALL BALL BALL BALL BALL BALL BALL BALL BALL
端子节距 1 mm 1.27 mm 1 mm 1 mm 1 mm 1.27 mm 1 mm 1 mm 1 mm 1 mm
端子位置 BOTTOM BOTTOM BOTTOM BOTTOM BOTTOM BOTTOM BOTTOM BOTTOM BOTTOM BOTTOM
处于峰值回流温度下的最长时间 20 20 20 20 20 20 20 20 20 20
宽度 13 mm 14 mm 13 mm 13 mm 13 mm 14 mm 13 mm 13 mm 13 mm 13 mm
是否无铅 含铅 含铅 含铅 含铅 含铅 含铅 含铅 含铅 含铅 -
Base Number Matches 1 1 1 1 1 1 1 1 1 -

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