74VCX163245 Low Voltage 16-Bit Dual Supply Translating Transceiver with 3-STATE Outputs
May 2007
74VCX163245
Low Voltage 16-Bit Dual Supply Translating
Transceiver with 3-STATE Outputs
Features
■
Bidirectional interface between busses ranging from
■
■
tm
General Description
The VCX163245 is a dual supply, 16-bit translating
transceiver that is designed for 2 way asynchronous
communication between busses at different supply volt-
ages by providing true signal translation. The supply rails
consist of V
CCA
, which is a higher potential rail operating
at 2.3V to 3.6V and V
CCB
, which is the lower potential
rail operating at 1.65V to 2.7V. (V
CCB
must be less than
or equal to V
CCA
for proper device operation). This dual
supply design allows for translation from 1.8V to 2.5V
busses to busses at a higher potential, up to 3.3V.
The Transmit/Receive (T/R) input determines the direc-
tion of data flow. Transmit (active-HIGH) enables data
from A Ports to B Ports; Receive (active-LOW) enables
data from B Ports to A Ports. The Output Enable (OE)
input, when HIGH, disables both A and B Ports by plac-
ing them in a High-Z condition. The A Port interfaces
with the higher voltage bus (2.7V to 3.3V); The B Port
interfaces with the lower voltage bus (1.8V to 2.5V). Also
the VCX163245 is designed so that the control pins
(T/R
n
, OE
n
) are supplied by V
CCB
.
The 74VCX163245 is suitable for mixed voltage applica-
tions such as notebook computers using a 1.8V CPU and
3.3V peripheral components. It is fabricated with an
Advanced CMOS technology to achieve high speed oper-
ation while maintaining low CMOS power dissipation.
■
■
■
■
■
1.65V to 3.6V
Supports Live Insertion and Withdrawal
(1)
Static Drive (I
OH
/I
OL
)
– ±24mA @ 3.0V V
CC
– ±18mA @ 2.3V V
CC
– ±6mA @ 1.65V V
CC
Uses patented Quiet Series™ noise/EMI reduction
circuitry
Functionally compatible with 74 series 16245
Latchup performance exceeds 300mA
ESD performance:
– Human Body Model
>2000V
– Machine model
>200V
Also packaged in plastic Fine-Pitch Ball Grid Array
(FBGA)
Note:
1. To ensure the high impedance state during power up
or power down, OE
n
should be tied to V
CCB
through a
pull up resistor. The minimum value of the resistor is
determined by the current sourcing capability of the
driver.
Ordering Information
Order Number
74VCX163245G
(2)(3)
74VCX163245MTD
(3)
Package Number
BGA54A
MTD48
Package Description
54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205,
5.5mm Wide
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC
MO-153, 6.1mm Wide
Notes:
2. Ordering code “G” indicates Trays.
3. Device also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Quiet Series™ is a trademark of Fairchild Semiconductor Corporation.
©2000 Fairchild Semiconductor Corporation
74VCX163245 Rev. 1.7
www.fairchildsemi.com
74VCX163245 Low Voltage 16-Bit Dual Supply Translating Transceiver with 3-STATE Outputs
Connection Diagram
Pin Assignment for TSSOP
Pin Assignment for FBGA
(Top Thru View)
FBGA Pin Assignments
1
A
B
C
D
E
F
G
H
J
B
0
B
2
B
4
B
6
B
8
B
10
B
12
B
14
B
15
2
NC
B
1
B
3
B
5
B
7
B
9
B
11
B
13
NC
3
T/R
1
NC
V
CCB
GND
GND
GND
V
CCB
NC
T/R
2
4
OE
1
NC
V
CCA
GND
GND
GND
V
CCA
NC
OE
2
5
NC
A
1
A
3
A
5
A
7
A
9
A
11
A
13
NC
6
A
0
A
2
A
4
A
6
A
8
A
10
A
12
A
14
A
15
Pin Descriptions
Pin
Names
OE
n
T/R
n
A
0
–A
15
B
0
–B
15
NC
Description
Output Enable Input (Active LOW)
Transmit/Receive Input
Side A Inputs or 3-STATE Outputs
Side B Inputs or 3-STATE Outputs
No Connect
Logic Diagram
©2000 Fairchild Semiconductor Corporation
74VCX163245 Rev. 1.7
www.fairchildsemi.com
2
74VCX163245 Low Voltage 16-Bit Dual Supply Translating Transceiver with 3-STATE Outputs
Truth Tables
Inputs
OE
1
L
L
H
Inputs
Outputs
Bus B
0
–B
7
Data to Bus A
0
–A
7
Bus A
0
–A
7
Data to Bus B
0
–B
7
HIGH Z State on A
0
–A
7
, B
0
–B
7
T/R
1
L
H
X
OE
2
L
L
H
T/R
2
L
H
X
Outputs
Bus B
8
–B
15
Data to Bus A
8
–A
15
Bus A
8
–A
15
Data to Bus B
8
–B
15
HIGH-Z State on A
8
–A
15
, B
8
–B
15
H
=
HIGH Voltage Level
L
=
LOW Voltage Level
X
=
Immaterial (HIGH or LOW, inputs may not float)
Z
=
High Impedance
VCX163245 Translator Power Up Sequence Recommendations
To guard against power up problems, some simple
guidelines need to be adhered to. The VCX163245 is
designed so that the control pins (T/R
n
, OE
n
) are sup-
plied by V
CCB
. Therefore the first recommendation is to
begin by powering up the control side of the device,
V
CCB
. The OE
n
control pins should be ramped with or
ahead of V
CCB
, this will guard against bus contentions
and oscillations as all A Port and B Port outputs will be
disabled. To ensure the high impedance state during
power up or power down, OE
n
should be tied to V
CCB
through a pull up resistor. The minimum value of the
resistor is determined by the current sourcing capability
of the driver. Second, the T/R
n
control pins should be
placed at logic LOW (0V) level, this will ensure that the
B-side bus pins are configured as inputs to help guard
against bus contention and oscillations. B-side Data
Inputs should be driven to a valid logic level (0V or
V
CCB
), this will prevent excessive current draw and oscil-
lations. V
CCA
can then be powered up after V
CCB
, how-
ever V
CCA
must be greater than or equal to V
CCB
to
ensure proper device operation. Upon completion of
these steps the device can then be configured for the
users desired operation. Following these steps will help
to prevent possible damage to the translator device as
well as other system components.
Logic Diagrams
Please note that these diagrams are provided only for the understanding of logic operations and should not be used
to estimate propagation delays.
©2000 Fairchild Semiconductor Corporation
74VCX163245 Rev. 1.7
www.fairchildsemi.com
3
74VCX163245 Low Voltage 16-Bit Dual Supply Translating Transceiver with 3-STATE Outputs
Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.
The absolute maximum ratings are stress ratings only.
Symbol
V
CCA
V
CCB
V
I
V
I/O
DC Input Voltage
DC Output Voltage
Outputs 3-STATE
A
n
Output Active
(4)
B
n
Output Active
(4)
I
IK
I
OK
Supply Voltage
Parameter
Rating
–0.5V to +4.6V
–0.5V to V
CCA
–0.5V to +4.6V
–0.5V to +4.6V
–0.5V to V
CCA
+ 0.5V
–0.5V to V
CCB
+ 0.5V
–50mA
–50mA
+50mA
±50mA
±100mA
–65°C to +150°C
DC Input Diode Current, V
I
<
0V
DC Output Diode Current
V
O
<
0V
V
O
>
V
CC
I
OH
/I
OL
DC Output Source/Sink Current
DC V
CC
or Ground Current
I
CC
or Ground Supply Pin
T
STG
Storage Temperature
Recommended Operating Conditions
(5)
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not
recommend exceeding them or designing to absolute maximum ratings.
Symbol
V
CCA
V
CCB
V
I
V
I/O
Input Voltage () @ OE, T/R
Input/Output Voltage ()
A
n
B
n
I
OH
/I
OL
Output Current in I
OH
/I
OL
V
CCA
=
3.0V to 3.6V
V
CCA
=
2.3V to 2.7V
V
CCB
=
2.3V to 2.7V
V
CCB
=
1.65V to 1.95V
T
A
∆t
/
∆
V
Power Supply
(6)
Parameter
Rating
2.3V to 3.6V
1.65V to 2.7V
0V to V
CCB
0V to V
CCA
0V to V
CCB
±24mA
±18mA
±18mA
±6mA
–40°C to +85°C
10ns/V
Free Air Operating Temperature
Minimum Input Edge Rate, V
IN
=
0.8V to 2.0V, V
CC
=
3.0V
Notes:
4. I
O
Absolute Maximum Rating must be observed.
5. Unused inputs or I/O pins must be held HIGH or LOW. They may not float.
6. Operation requires: V
CCB
≤
V
CCA
©2000 Fairchild Semiconductor Corporation
74VCX163245 Rev. 1.7
www.fairchildsemi.com
4
74VCX163245 Low Voltage 16-Bit Dual Supply Translating Transceiver with 3-STATE Outputs
DC Electrical Characteristics
(1.65V < V
CCB
≤
1.95V, 2.3V < V
CCA
≤
2.7V)
Symbol
V
IHA
V
IHB
V
ILA
V
ILB
V
OHA
V
OHB
V
OLA
V
OLB
I
I
I
OZ
Parameter
HIGH Level Input
Voltage
LOW Level Input
Voltage
A
n
B
n
, T/R, OE
A
n
B
n
, T/R, OE
V
CCB
(V)
1.65–1.95
1.65–1.95
1.65–1.95
1.65–1.95
1.65–1.95
1.65
V
CCA
(V)
2.3–2.7
2.3–2.7
2.3–2.7
2.3–2.7
2.3–2.7
2.3–2.7
2.3–2.7
2.3
2.3–2.7
2.3–2.7
2.3–2.7
2.3
2.3–2.7
2.3–2.7
Conditions
Min.
1.6
0.65 x V
CCB
Max.
Units
V
V
0.7
0.35 x V
CCB
I
OH
=
–100µA
I
OH
=
–18mA
I
OH
=
–100µA
I
OH
=
–6mA
I
OL
=
100µA
I
OL
=
18mA
I
OL
=
100µA
I
OL
=
6mA
0V
≤
V
I
≤
3.6V
0V
≤
V
O
≤
3.6V,
OE
=
V
CCB,
V
I
=
V
IH
or V
IL
0
≤
(V
I
, V
O
)
≤
3.6V
A
n
=
V
CCA
or GND,
B
n
, OE, & T/R
=
V
CCB
or GND
V
CCA
≤
An
≤
3.6V,
V
CCB
≤
B
n
, OE,
T/R
≤
3.6V
V
I
=
V
CCB
– 0.6V
V
I
=
V
CCA
– 0.6V
V
CCA
– 0.2
1.7
V
CCB
– 0.2
1.25
0.2
0.6
0.2
0.3
±5.0
±10
V
V
V
HIGH Level Output Voltage
HIGH Level Output Voltage
1.65–1.95
1.65–1.95
V
Low Level Output Voltage
1.65–1.95
1.65
V
Low Level Output Voltage
1.65–1.95
1.65–1.95
V
Input Leakage Current @ OE,
T/R
3-STATE Output Leakage
1.65–1.95
1.65–1.95
µA
µA
I
OFF
Power Off Leakage Current
0
1.65–1.95
0
2.3–2.7
10
20
µA
µA
I
CCA
/I
CCB
Quiescent Supply Current,
per supply, V
CCA
/ V
CCB
1.65–1.95
2.3–2.7
±20
µA
∆I
CC
Increase in I
CC
per Input, B
n
,
T/R, OE
Increase in I
CC
per Input, A
n
1.65–1.95
1.65–1.95
2.3–2.7
2.3–2.7
750
750
µA
µA
©2000 Fairchild Semiconductor Corporation
74VCX163245 Rev. 1.7
www.fairchildsemi.com
5
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