MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Dual Supply Octal
Translating Transceiver
with 3-State Outputs
The 74LVX4245 is a 24–pin dual–supply, octal translating transceiver
that is designed to interface between a 5V bus and a 3V bus in a mixed
3V/5V supply environment such as laptop computers using a 3.3V CPU
and 5V LCD display. The A port interfaces with the 5V bus; the B port
interfaces with the 3V bus.
The Transmit/Receive (T/R) input determines the direction of data flow.
Transmit (active–High) enables data from the A port to the B port.
Receive (active–Low) enables data from the B port to the A port. The
Output Enable (OE) input, when High, disables both A and B ports by
placing them in 3–State.
MC74LVX4245
LOW–VOLTAGE CMOS
LVX
•
•
•
•
•
Bi–directional Interface Between 5V and 3V Buses
Control Inputs Compatible with TTL Level
5V Data Flow at A Port and 3V Data Flow at B Port
Outputs Source/Sink 24mA at 5V Bus and 12mA at 3V Bus
DW SUFFIX
24–LEAD PLASTIC SOIC PACKAGE
CASE 751E–04
Guaranteed Simultaneous Switching Noise Level and Dynamic
Threshold Performance
•
Available in SOIC and TSSOP Packages
•
Functionally Compatible with the 74 Series 245
VCCB VCCB OE
24
23
22
B0
21
B1
20
B2
19
B3
18
B4
17
B5
16
B6
15
B7
14
GND
13
DT SUFFIX
24–LEAD PLASTIC TSSOP PACKAGE
CASE 948H–01
PIN NAMES
1
2
3
A0
4
A1
5
A2
6
A3
7
A4
8
A5
9
A6
10
A7
11
12
Pins
OE
T/R
A0–A7
B0–B7
Function
Output Enable Input
Transmit/Receive Input
Side A 3–State Inputs or 3–State
Outputs
Side B 3–State Inputs or 3–State
Outputs
VCCA T/R
GND GND
Figure 1. 24–Lead Pinout
(Top View)
7/97
©
Motorola, Inc. 1997
77
REV 2
MC74LVX4245
ABSOLUTE MAXIMUM RATINGS*
Symbol
VCCA, VCCB
VI
VI/O
DC Supply Voltage
DC Input Voltage
DC Input/Output Voltage
OE, T/R
An
Bn
IIK
IOK
IO
ICC, IGND
DC Input Diode Current
DC Output Diode Current
DC Output Source/Sink Current
DC Supply Current
Per Output Pin
Maximum Current at ICCA
Maximum Current at ICCB
OE, T/R
Parameter
Value
–0.5 to +7.0
–0.5 to VCCA +0.5
–0.5 to VCCA +0.5
–0.5 to VCCB +0.5
±20
±50
±50
±50
±200
±100
–65 to +150
±300
VI < GND
VO < GND; VO > VCC
Condition
Unit
V
V
V
V
mA
mA
mA
mA
TSTG
Latchup
Storage Temperature Range
DC Latchup Source/Sink Current
°C
mA
* Absolute maximum continuous ratings are those values beyond which damage to the device may occur. Exposure to these conditions or conditions
beyond those indicated may adversely affect device reliability. Functional operation under absolute–maximum–rated conditions is not implied.
RECOMMENDED OPERATING CONDITIONS
Symbol
VCCA, VCCB
VI
VI/O
TA
∆t/∆V
Supply Voltage
Input Voltage
Input/Output Voltage
Operating Free–Air Temperature
Minimum Input Edge Rate
VIN from 30% to 70% of VCC; VCC at 3.0V, 4.5V, 5.5V
Parameter
VCCA
VCCB
OE, T/R
An
Bn
Min
4.5
2.7
0
0
0
–40
0
Max
5.5
3.6
VCCA
VCCA
VCCB
+85
8
Unit
V
V
V
°C
ns/V
DC ELECTRICAL CHARACTERISTICS
TA = 25°C
Symbol
VIHA
VIHB
VILA
VILB
VOHA
VOHB
Minimum HIGH Level
Output Voltage
Maximum LOW Level
Input Voltage
Parameter
Minimum HIGH Level
Input Voltage
An,OE
T/R
Bn
An,OE
T/R
Bn
Condition
VOUT
≤
0.1V
or
≥
VCC – 0.1V
VOUT
≤
0.1V
or
≥
VCC – 0.1V
IOUT = –100µA
IOH = –24mA
IOUT = –100µA
IOH = –12mA
IOH = –8mA
Maximum LOW Level
Output Voltage
IOUT = 100µA
IOL = 24mA
IOUT = 100µA
IOL = 12mA
IOL = 8mA
VCCA
5.5
4.5
5.0
5.0
5.5
4.5
5.0
5.0
4.5
4.5
4.5
4.5
4.5
4.5
4.5
4.5
4.5
4.5
VCCB
3.3
3.3
3.6
2.7
3.3
3.3
2.7
3.6
3.0
3.0
3.0
3.0
2.7
3.0
3.0
3.0
3.0
2.7
4.50
4.25
2.99
2.80
2.50
0.002
0.18
0.002
0.1
0.1
Typ
2.0
2.0
2.0
2.0
0.8
0.8
0.8
0.8
4.40
3.86
2.9
2.4
2.4
0.10
0.36
0.10
0.31
0.31
TA = –40 to +85°C
Guaranteed Limits
2.0
2.0
2.0
2.0
0.8
0.8
0.8
0.8
4.40
3.76
2.9
2.4
2.4
0.10
0.44
0.10
0.40
0.40
Unit
V
V
V
V
V
V
VOLA
VOLB
V
V
LVX Data — Low–Voltage CMOS Logic
BR1492 — Rev 0
79
MOTOROLA
MC74LVX4245
AC ELECTRICAL CHARACTERISTICS
TA = –40 to +85°C
CL = 50pF
VCCA = 5V
±0.5V
VCCB = 3.3V
±0.3V
Symbol
tPHL
tPLH
tPHL
tPLH
tPZL
tPZH
tPZL
tPZH
tPHZ
tPLZ
tPHZ
tPLZ
Parameter
Propagation Delay A to B
Propagation Delay B to A
Output Enable Time OE to B
Output Enable Time OE to A
Output Disable Time OE to B
Output Disable Time OE to A
Min
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
Typ
(Note 4.)
5.1
5.3
5.4
5.5
6.5
6.7
5.2
5.8
6.0
3.3
3.9
2.9
Max
9.0
9.0
9.0
9.0
10.5
10.5
9.5
9.5
10.0
7.0
7.5
7.0
TA = –40 to +85°C
CL = 50pF
VCCA = 5V
±0.5V
VCCB = 2.7V
Min
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
Max
10.0
10.0
10.0
10.0
11.5
11.5
10.0
10.0
10.0
7.5
7.5
7.5
Unit
ns
ns
ns
ns
ns
ns
tOSHL
ns
Output to Output Skew, Data to Output (Note 5.)
1.0
1.5
1.5
tOSLH
4. Typical values at VCCA = 5.0V; VCCB = 3.3V at 25°C.
5. Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device.
The specification applies to any outputs switching in the same direction, either HIGH–to–LOW (tOSHL) or LOW–to–HIGH (tOSLH); parameter
guaranteed by design.
Dual Supply Octal Translating Transceiver
The 74LVX4245 is a is a dual–supply device well capable
of bidirectional signal voltage translation. This level shifting
ability provides an excellent interface between low voltage
CPU local bus and a standard 5V I/O bus. The device control
inputs can be controlled by either the low voltage CPU and
core logic or a bus arbitrator with 5V I/O levels.
The LVX4245 is ideal for mixed voltage applications such
as notebook computers using a 3.3V CPU and 5V peripheral
devices.
Applications:
Mixed Mode Dual Supply Interface Solutions
The LVX4245 is designed to solve 3V/5V interfaces when
CMOS devices cannot tolerate I/O levels above their applied
VCC. If an I/O pin of a 3V device is driven by a 5V device, the
P–Channel transistor in the 3V device will conduct — causing
current flow from the I/O bus to the 3V power supply. The
result may be destruction of the 3V device through latchup
effects. A current limiting resistor may be used to prevent
destruction, but it causes speed degradation and needless
power dissipation.
A better solution is provided in the LVX4245. It provides
two different output levels that easily handle the dual voltage
interface. The A port is a dedicated 5V port; the B port is a
dedicated 3V port. Figure 4 on page 82 shows how the
LVX4245 may fit into a mixed 3V/5V system.
Since the LVX4245 is a ‘245 transceiver, the user may
either use it for bidirectional or unidirectional applications.
The center 20 pins are configured to match a ‘245 pinout.
This enables the user to easily replace this level shifter with a
3V ‘245 device without additional layout work or re–
manufacture of the circuit board (when both buses are 3V).
LOW VOLTAGE CPU LOCAL BUS
VCCB
LVX4245
VCCA
VCCB
LVX4245
VCCA
EISA – ISA – MCA
(5V I/O LEVELS)
Figure 3. 3.3V/5V Interface Block Diagram
Powering Up the LVX4245
When powering up the LVX4245, please note that if the
VCCB pin is powered–up well in advance of the VCCA pin,
several milliamps of either ICCA or ICCB current will result. If
the VCCA pin is powered–up in advance of the VCCB pin then
only nanoamps of Icc current will result. In actuality the VCCB
can be powered “slightly” before the VCCA without the current
penalty, but this “setup time” is dependent on the power–up
ramp rate of the VCC pins. With a ramp rate of approximately
50mV/ns (50V/µs) a 25ns setup time was observed (VCCB
LVX Data — Low–Voltage CMOS Logic
BR1492 — Rev 0
81
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