74FR245 Octal Bidirectional Transceiver with 3-STATE Outputs
August 1990
Revised August 1999
74FR245
Octal Bidirectional Transceiver with 3-STATE Outputs
General Description
The 74FR245 contains eight non-inverting bidirectional
buffers with 3-STATE outputs and is intended for bus-ori-
ented applications. Current sinking capability is 64 mA on
both the A and B Ports. The Transmit/Receive (T/R) input
determines the direction of data flow through the bidirec-
tional transceiver. Transmit (active-HIGH) enables data
from A Ports to B Ports; Receive (active-LOW) enables
data from B Ports to A Ports. The Output Enable input,
when HIGH, disables both A and B Ports by placing them
in a High Z condition.
Features
s
Non-inverting buffers
s
Bidirectional data path
s
A and B output sink capability of 64 mA, source
capability of 15 mA
s
Guaranteed pin-to-pin skew
Ordering Code:
Order Number
74FR245SC
74FR245SJ
74FR245PC
Package Number
M20B
M20D
N20A
Package Description
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbol
Connection Diagram
Pin Descriptions
Pin Names
OE
T/R
A
0
–A
7
B
0
–B
7
Description
Output Enable Input (Active-LOW)
Transmit/Receive Input
Side A Inputs or 3-STATE Outputs
Side B Inputs or 3-STATE Outputs
Truth Table
Inputs
Output
OE
L
L
H
H
=
HIGH Voltage Level
L
=
LOW Voltage Level
X
=
Immaterial
T/R
L
H
X
Bus B Data to Bus A
Bus A Data to Bus B
High Z State
© 1999 Fairchild Semiconductor Corporation
DS010887
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74FR245
Logic Diagram
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2
74FR245
Absolute Maximum Ratings
(Note 1)
Storage Temperature
Ambient Temperature under Bias
Junction Temperature under Bias
V
CC
Pin Potential to Ground Pin
Input Voltage (Note 2)
Input Current (Note 2)
Voltage Applied to Output
in HIGH State (with V
CC
=
0V)
Standard Output
3-STATE Output
Current Applied to Output
in LOW State (Max)
ESD Last Passing Voltage (Min)
twice the rated I
OL
(mA)
4000V
−0.5V
to V
CC
−0.5V
to
+5.5V
−65°C
to
+150°C
−55°C
to
+125°C
−55°C
to
+150°C
−0.5V
to
+7.0V
−0.5V
to
+7.0V
−30
mA to
+5.0
mA
Recommended Operating
Conditions
Free Air Ambient Temperature
Supply Voltage
0°C to
+70°C
+4.5V
to
+5.5V
Note 1:
Absolute maximum ratings are values beyond which the device
may be damaged or have its useful life impaired. Functional operation
under these conditions is not implied.
Note 2:
Either voltage limit or current limit is sufficient to protect inputs.
DC Electrical Characteristics
Symbol
V
IH
V
IL
V
CD
V
OH
V
OL
I
IH
I
BVI
I
BVIT
I
IL
V
ID
I
OD
I
IH
+
I
OZH
I
IL
+
I
OZL
I
OS
I
CEX
I
ZZ
I
CCH
I
CCL
I
CCZ
C
IN
Parameter
Input HIGH Voltage
Input LOW Voltage
Input Clamp Diode Voltage
Output HIGH Voltage
Output LOW Voltage
Input HIGH Current
Input HIGH Current
Breakdown Test
Input HIGH Current
Breakdown Test (I/O)
Input LOW Current
Input Leakage Test
Output Circuit
Leakage Current
Output Leakage Current
Output Leakage Current
Output Short-Circuit Current
Output HIGH Leakage Current
Bus Drainage Test
Power Supply Current
Power Supply Current
Power Supply Current
Input Capacitance
55
75
55
8.0
17.0
−100
4.75
2.4
2.0
0.55
5
7
100
−250
Min
2.0
0.8
−1.2
Typ
Max
Units
V
V
V
V
V
V
µA
µA
µA
µA
V
Min
Min
Min
Min
Max
Max
Max
Max
0.0
V
CC
Conditions
Recognized HIGH Signal
Recognized LOW Signal
I
IN
= −18
mA
I
OH
= −3
mA (A
n
, B
n
)
I
OH
= −15
mA (A
n
, B
n
)
I
OL
=
64 mA (A
n
, B
n
)
V
IN
=
2.7V (OE, T/R)
V
IN
=
7.0V (OE, T/R)
V
IN
=
5.5V (A
n
, B
n
)
V
IN
=
0.5V (OE, T/R)
I
ID
=
1.9
µA
All Other Pins Grounded
3.75
25
−150
−225
50
100
75
110
75
µA
µA
µA
mA
µA
µA
mA
mA
mA
pF
pF
0.0
Max
Max
Max
Max
0.0
Max
Max
Max
5.0
5.0
V
IOD
=
150 mV
All Other Pins Grounded
V
OUT
=
2.7V (A
n
, B
n
)
V
OUT
=
0.5V (A
n
, B
n
)
V
OUT
=
0.0V (A
n
, B
n
)
V
OUT
=
V
CC
(A
n
, B
n
)
V
OUT
=
5.25V (A
n
, B
n
)
All Outputs HIGH
All Outputs LOW
Outputs 3-STATE
OE, T/R
A
n
, B
n
3
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74FR245
AC Electrical Characteristics
T
A
= +25°C
Symbol
Parameter
Min
t
PLH
t
PHL
t
PZH
t
PZL
t
PHZ
t
PLZ
Output Disable Time
Propagation Delay
A
n
to B
n
or B
n
to A
n
Output Enable Time
1.0
1.0
2.5
2.5
1.7
1.7
V
CC
= +5.0V
C
L
=
50 pF
Typ
2.6
1.7
5.0
4.3
3.7
3.6
Max
3.9
3.9
7.0
7.0
6.5
6.5
T
A
=
0°C to
+70°C
V
CC
= +5.0V
C
L
=
50 pF
Min
1.0
1.0
2.5
2.5
1.7
1.7
Max
3.9
3.9
7.0
7.0
6.5
6.5
ns
ns
ns
Units
Extended AC Characteristics
Symbol
Parameter
T
A
=
0°C to
+70°C
V
CC
= +5.0V
C
L
=
50 pF
Eight Outputs Switching
(Note 3)
Min
t
PLH
t
PHL
t
PZH
t
PZL
t
PHZ
t
PLZ
t
OSHL
(Note 5)
t
OSLH
(Note 5)
t
OST
(Note 5)
Pin to Pin Skew
for HL Transitions
Pin to Pin Skew
for LH Transitions
Pin to Pin Skew
for HL/LH Transitions
Output Disable Time
Propagation Delay
A
n
to B
n
or B
n
to A
n
Output Enable Time
1.0
1.0
2.5
2.5
1.3
1.3
Max
5.9
5.9
11.9
11.9
6.5
6.5
1.7
1.0
3.3
Min
2.5
2.5
Max
7.5
7.5
ns
ns
ns
ns
ns
ns
T
A
=
0°C to
+70°C
V
CC
= +5.0V
C
L
=
250 pF
(Note 4)
Units
Note 3:
This specification is guaranteed but not tested. The limits apply to propagation delays for all paths described switching in phase, i.e., all LOW-to-
HIGH, HIGH-to-LOW, 3-STATE-to-HIGH, etc.
Note 4:
These specifications guaranteed but not tested. The limits represent propagation delays with 250 pF load capacitors in place of the 50 pF load
capacitors in the standard AC load. This specification pertains to single output switching only.
Note 5:
Skew is defined as the absolute value of the difference between the actual propagation delays for any two outputs of the same device. The specifi-
cation applies to any outputs switching HIGH-to-LOW (t
OSHL
), LOW-to-HIGH (t
OSLH
), or HIGH-to-LOW and/or LOW-to-HIGH (t
OST
). Specifications guaran-
teed with all outputs switching in phase.
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4
74FR245
Physical Dimensions
inches (millimeters) unless otherwise noted
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
Package Number M20B
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
Package Number M20D
5
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