Model 576
Temperature Compensated Crystal Oscillator
FEATURES
•
•
•
•
•
•
•
•
•
•
CMOS Output
Optional Voltage Control for Frequency Tuning [VCTCXO]
7.0mmx5.0mm Surface Mount Package
Frequency Range 10 – 40 MHz
[Standard Frequencies List Shown Below]
Fundamental Crystal Design
Frequency Stability, several options to choose from, ±0.5ppm ~ ±5.0ppm
Operating Voltage, +2.8Vdc ~ +5.0Vdc
Operating Temperature to -40°C to +85°C
Tape & Reel Packaging Available
RoHS/Green Compliant (6/6)
APPLICATIONS
The Model 576 Temperature Compensated Crystal Oscillator (TCXO) is a quartz
based, CMOS output, analog temperature compensated oscillator with optional frequency
tuning, in a hermetically sealed ceramic package. M576 is suitable for base stations, wireless
communications, test and measurement, Femtocell, WLAN/WiMax/WIFI and mobile phone applications.
ORDERING INFORMATION
576
SUPPLY VOLTAGE
T = +2.8Vdc
R = +3.0Vdc
L = +3.3Vdc
S = +5.0Vdc
FREQUENCY STABILITY *
05
10
15
20
25
30
40
50
=
=
=
=
=
=
=
=
±
±
±
±
±
±
±
±
0.5 ppm
1
1.0 ppm
1.5 ppm
2.0 ppm
2.5 ppm (std)
3.0 ppm
4.0 ppm
5.0 ppm
M
FREQUENCY IN MHz
M - indicates MHz and decimal point.
2
[See table below for standard frequencies available.]
FREQUENCY TUNING (AFC)
A = ± 5 ppm (std)
B = ± 8 ppm
C = ± 10 ppm
D = ± 12 ppm
T = TCXO (no AFC)
{V
CON
: 1.5Vdc ± 1.0Vdc}
OPERATING TEMPERATURE RANGE
H = -10°C to +60°C
C = -20°C to +70°C
D = -30°C to +85°C (std)
I = -40°C to +85°C
* Frequency vs. Temperature Only
1] Only available with temperature range codes "H" and "C".
2] Frequency is recorded with two leading digits before the ‘M’ and 4 significant digits after the ‘M’ (including zeros).
[Ex. XXMXXXX (10M0000), XXMXXXX (16M3840)]
Not all performance combinations and frequencies may be available.
Contact your local CTS Representative or CTS Customer Service for availability.
M576 Standard Frequencies
10.000 MHz
10.240 MHz
12.000 MHz
12.288 MHz
12.800 MHz
14.000 MHz
15.360 MHz
16.000 MHz
16.800 MHz
18.000 MHz
18.432 MHz
19.200 MHz
19.440 MHz
20.000 MHz
20.480 MHz
24.000 MHz
24.576 MHz
25.000 MHz
26.000 MHz
27.000 MHz
32.000 MHz
32.768 MHz
38.880 MHz
40.000 MHz
Document No. 008-0340-0
Page 1 - 4
Rev. A
www.ctscorp.com
TCXO/VC-TCXO – CMOS OUTPUT
ELECTRICAL CHARACTERISTICS
PARAMETER
Maximum Supply Voltage
Maximum Control Voltage
Storage Temperature
Frequency Range
Frequency Stability
Frequency Stability
vs. Initial Calibration
vs. Supply Voltage
vs. Load
vs. Reflow Shift
vs. Aging
ELECTRICAL PARAMETERS
Operating Temperature
Order Code 'H'
Order Code 'C'
Order Code 'D'
Order Code 'I'
Supply Voltage
Order Code 'T'
Order Code 'R'
Order Code 'L'
Supply Current
Control Voltage
Frequency Tuning
[VCTCXO Only]
V
C
Input Impedance
Output Waveform
Output Voltage Levels
Logic '1' Level
Logic '0' Level
Output Load
Rise and Fall Time
Output Duty Cycle
Start Up Time
SYMBOL
V
CC
V
C
T
STG
f
O
Δf/f
O
CONDITIONS
-
-
-
Std frequencies listed in Ordering Information
Model 576
MIN
-0.6
-0.5
-55
10
TYP
-
-
-
MAX
6.0
V
CC
125
UNIT
V
V
°C
MHz
± ppm
Frequency vs. Temperature Only
-
40
0.5,1.0,1.5,2.0
2.5,3.0,4.0,5.0
-
0.3
-
-
-
-
1.0
0.5
0.2
2.0
1.0
8.0
60
70
85
85
2.94
3.15
3.47
6.0
2.5
-
-
@25°C
±5% change
±10% change
After 2 reflows
1st year
10 year (Except stability code 05)
-
-
-
-
-
-
-10
-20
-30
-40
2.66
2.85
3.14
-
± ppm
T
A
-
25
°C
V
CC
I
CC
V
C
-
Z
C
±5%
2.8
3.0
3.3
-
1.5
5,8,10,12
-
V
mA
V
± ppm
kOhm
-
V
C
= 1.5V ±1.0V
-
DC coupled CMOS
0.5
100
V
OH
V
OL
R
L
// C
L
T
R
, T
F
SYM
T
S
CMOS Load
CMOS Load
-
@ 20% - 80% Levels
@ 50% Level
-
0.9*V
CC
-
-
-
45
-
-
-
-
3.0
-
-
-
0.1*V
CC
15
6.0
55
2
V
pF
ns
%
ms
dBc/Hz
-
-
Phase Noise
1
Notes:
1. Phase Noise performance may vary based on output frequency. See example plot at 10 MHz below.
SINGLE SIDE BAND PHASE NOISE
(typical maximums @ 10 MHz)
Frequency
Phase Noise
Offset
(dBc/Hz)
10 Hz
-95
100 Hz
-120
1k Hz
-140
10k Hz
-148
Document No. 008-0340-0
Page 2 - 4
Rev. A
TCXO/VC-TCXO – CMOS OUTPUT
MECHANICAL SPECIFICATIONS
PACKAGE DRAWING
(1.4 ±0.1)
0.055 ±0.004
{Pads 1 - 4}
Model 576
(7.0 ±0.2)
0.276 ±0.008
MARKING INFORMATION
1. M576 - CTS Model Series.
2.
●
– Pin 1 identifier.
3. C – CTS identifier.
4. D – Date code. See Table II for codes.
5. XXX – Frequency code. See Table I for codes.
4
(0.8 ±0.1)
0.031 ±0.004
{Pads 1 - 4}
3
M576
●
CDXXX
(5.0 ±0.2)
0.197 ±0.008
(4.0 ±0.1)
0.157 ±0.004
2
1
Complete CTS part number, frequency value and
date code information must appear on reel and
carton labels.
NOTES
1. DO NOT make connections to non-labeled pins.
Castellation pins may have internal connections
used in the manufacturing process.
2. Termination pads (e4); barrier plating is nickel
(Ni) with gold (Au) flash plate.
3. Reflow conditions per JEDEC J-STD-020,
260°C maximum.
(5.08 ±0.2)
0.200 ±0.004
(2.0)
MAX
0.079
(0.3 ±0.1)
0.012 ±0.004
Key:
(mm)
Inch
(0.2)
TYP
0.008
SUGGESTED SOLDER PAD GEOMETRY
.225 [5.71]
TABLE I – FREQUENCY CODING
FREQUENCY
MARKING
CODE
100
102
120
122
128
130
135
140
144
FREQUENCY
MARKING
CODE
153
160
16A
16B
16C
16D
163
168
180
FREQUENCY
MARKING
CODE
184
192
194
196
198
199
200
204
240
FREQUENCY
MARKING
CODE
250
260
270
320
325
327
388
400
C
BYPASS
4
3
10.000 MHz
10.240 MHz
12.000 MHz
12.288 MHz
12.800 MHz
13.000 MHz
13.500 MHz
14.000 MHz
15.360 MHz
16.000 MHz
16.367 MHz
16.367667 MHz
16.368 MHz
16.369 MHZ
16.384 MHz
16.800 MHz
18.000 MHz
18.432 MHz
19.200 MHz
19.440 MHz
19.680 MHz
19.800 MHz
19.998 MHz
20.000 MHz
20.480 MHz
24.000 MHz
25.000 MHz
26.000 MHz
27.000 MHz
32.000 MHz
32.512 MHz
32.768 MHz
38.880 MHz
40.000 MHz
.165 [4.20]
1
2
.047 [1.20]
.071 [1.80]
[mm]
Key:
Inch
14.400 MHz
C
BYPASS
should be
≥
0.01 uF.
Not all frequencies listed may be available for this design.
TABLE II – DATE CODE
MONTH
YEAR
2001
2002
2003
2004
2005
2006
2007
2008
2009
2010
2011
2012
2013
2014
2015
2016
2017
2018
2019
2020
JAN
A
N
a
n
FEB
B
P
b
p
MAR
C
Q
c
q
APR
D
R
d
r
MAY
E
S
e
s
JUN
F
T
f
t
JUL
G
U
g
u
AUG
H
V
h
v
SEP
J
W
j
w
OCT
K
X
k
x
NOV
L
Y
l
y
DEC
M
Z
m
z
TEST CIRCUIT – RL//CL LOAD
+
mA
-
D.U.T. PIN ASSIGNMENTS
PIN
1
SYMBOL
V
C
GND
Output
V
CC
DESCRIPTION
Control Voltage – VCTCXO (Note 1)
GND - TCXO
Circuit & Package Ground
CMOS Output
Supply Voltage
4
+
POWER
SUPPLY
3
D.U.T.
+
VM
-
0.01uF
C
L
2
Including probe
capacitance.
-
1
2
3
4
NOTES
1. Connect to ground for TCXO (no AFC) option.
Control Voltage - VC-TCXO
GND - TCXO
Document No. 008-0340-0
Page 3 - 4
Rev. A
TCXO/VC-TCXO – CMOS OUTPUT
PACKAGING INFORMATION
Device quantity is 1,000 pieces per 180mm reel.
17.5
2.0
Model 576
4.0
8.0
Ø1.50
1.75
2.40
2.10
Ø13
120°
8.40
7.90
16.0
Ø60
Ø180
5.70
5.40
DIRECTION OF FEED
Dimensions in Millimeters
Ø23
Dimensions in Millimeters
ENVIRONMENTAL SPECIFICATIONS
Temperature Cycle:
Mechanical Shock:
Sinusoidal Vibration:
Gross Leak:
Fine Leak:
Resistance to Solder Heat:
High Temperature Operating Bias:
Frequency Aging:
Insulation Resistance:
Moisture Sensitivity Level:
400 cycles from –55°C to +125°C, 10 minute dwell at each temperature, 1 minute transfer time
between temperatures.
1,500g’s, 0.5mS duration, ½ sinewave, 3 shocks each direction along 3 mutually perpendicular
planes (18 total shocks).
0.06 inches double amplitude, 10 to 55 Hz and 20g’s, 55 to 2,000 Hz, 3 cycles each in 3 mutually
perpendicular planes (9 times total).
No leak shall appear while immersed in an FC40 or equivalent liquid at +125°C for 20 seconds.
Mass spectrometer leak rates less than 2x10
-8
ATM cc/sec air equivalent.
Product must survive 3 reflows of +250°C maximum, 10 seconds maximum.
2,000 hours at +125°C, disregarding frequency shift.
1,000 hours at +85°C.
500M Ohms @ 100V
DC
±15V
DC
.
Level 1 per JEDEC J-STD-020.
Document No. 008-0340-0
Page 4 - 4
Rev. A
FPGA/CPLD
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