71M6545/71M6545H
Metrology Processors
GENERAL DESCRIPTION
The 71M6545/71M6545H metrology processors are based on
4th-generation metering architecture supporting the 71M6xxx
series of isolated current sensing products that offer drastic
reduction in component count, immunity to magnetic tampering,
and unparalleled reliability. The 71M6545/71M6545H integrate
our Single Converter Technology® with a 22-bit delta-sigma
ADC, a customizable 32-bit computation engine (CE) for core
metrology functions, as well as a user-programmable 8051-
compatible application processor (MPU) core with up to 64KB
flash and up to 5KB RAM.
An external host processor can access metrology functions di-
rectly through the SPI™ interface, or alternatively through the
embedded MPU core in applications requiring metrology data
capture, storage, and preprocessing within the metrology
subsystem. In addition, the devices integrate an RTC, DIO, and
UART. A complete array of ICE and development tools,
programming libraries, and reference designs enable rapid
development and certification of meters that meet all ANSI and
IEC electricity metering standards worldwide.
C
FEATURES
•
0.1% Typical Accuracy Over 2000:1
Current Range
•
Exceeds IEC 62053/ANSI C12.20 Standards
•
Seven Sensor Inputs with Neutral Current
Measurement, Differential Mode Selectable
for Current Inputs
•
Selectable Gain of 1 or 8 for One Current
Input to Support Shunts
•
High-Speed Wh/VARh Pulse Outputs with
Programmable Width
•
Flash/RAM Size
32KB/3KB (71M6545)
64KB/5KB (71M6545H)
•
Up to Four Pulse Outputs with Pulse Count
•
Four-Quadrant Metering, Phase
Sequencing
•
Digital Temperature Compensation
Metrology Compensation
Accurate RTC for TOU Functions with
Automatic Temperature Compensation
for Crystal in All Power Modes
•
Independent 32-Bit Compute Engine
•
46–64Hz Line Frequency Range with the
Same Calibration
•
Phase Compensation (±7°)
•
1µA Supply Current in Sleep Mode
•
Flash Security
•
In-System Program Update
•
8-Bit MPU (80515), Up to 5 MIPS, for
Optional Implementation of Postprocessing
and Host Support Functions (Optional Use)
•
Up to 29 DIO Pins
•
Hardware Watchdog Timer (WDT)
•
I
2
C/MICROWIRE® EEPROM Interface
•
SPI Interface for Host:
Full Access to Shared Memory Space
Flash Program Capability
•
UART
•
Industrial Temperature Range
•
64-Pin Lead(Pb)-Free LQFP Package
Shunt Resistor Sensors
NEUTRAL
B
A
LOAD
POWER SUPPLY
71M6xx3
71M6xx3
71M6xx3
This system is referenced to Neutral
NEUTRAL
Resistor Dividers
Pulse Transformers
C
B
MUX and ADC
IADC0
}
IN*
IADC1
VADC10 (VC)
IADC6
IADC7
}
IC
VADC9 (VB)
IADC4
}
IB
IADC5
VADC8(VA)
IADC2
}
IA
IADC3
VREF
SERIAL PORT
RX
TX
V3P3A V3P3SYS GNDA GNDD
PWR MODE
CONTROL
71M6545/H
PB
REGULATOR
VBAT_RTC
A
TEMPERATURE
SENSOR
BATTERY
MONITOR
OSCILLATOR/
PLL
XIN
XOUT
RTC
BATTERY
RAM
32 kHz
FLASH
MEMORY
ICE
SPI_CKI
SPI_DI
SPI_DO
SPI_CSZ
XFER_BUSY
SAG
RTC
TIMERS
MPU
DIO, PULSES,
LEDs
DIO
24
DIO
I
2
C or µWire
EEPROM
V3P3D
SPI INTERFACE
HOST
T
M
COMPUTE
U
ENGINE
X
WPULSE
XPULSE
RPULSE
YPULSE
10/7/2010
PULSES
3.3 VDC
*IN = Optional Neutral Current
Single Converter Technology is a registered trademark of Maxim Integrated Products, Inc.
MICROWIRE is a registered trademark of National Semiconductor Corp.
For pricing, delivery, and ordering information, please contact Maxim Direct at
1-888-629-4642, or visit Maxim Integrated’s website at www.maximintegrated.com.
19-5378; Rev 2; 10/13
71M6545/71M6545H Data Sheet
Table of Contents
1
2
Introduction ....................................................................................................................................... 10
Hardware Description ....................................................................................................................... 11
2.1 Hardware Overview ................................................................................................................... 11
2.2 Analog Front End (AFE)............................................................................................................. 12
2.2.1 Signal Input Pins ............................................................................................................ 13
2.2.2 Input Multiplexer............................................................................................................. 14
2.2.3 Delay Compensation ..................................................................................................... 19
2.2.4 ADC Pre-Amplifier ......................................................................................................... 20
2.2.5 A/D Converter (ADC) ..................................................................................................... 20
2.2.6 FIR Filter ........................................................................................................................ 20
2.2.7 Voltage References ....................................................................................................... 20
2.2.8 71M6xx3 Isolated Sensor Interface ............................................................................... 21
2.3 Digital Computation Engine (CE) ............................................................................................... 25
2.3.1 CE Program Memory ..................................................................................................... 25
2.3.2 CE Data Memory ........................................................................................................... 25
2.3.3 CE Communication with the MPU ................................................................................. 25
2.3.4 Meter Equations ............................................................................................................. 26
2.3.5 Real-Time Monitor (RTM) .............................................................................................. 26
2.3.6 Pulse Generators ........................................................................................................... 26
2.3.7 CE Functional Overview ................................................................................................ 28
2.4 80515 MPU Core ....................................................................................................................... 30
2.4.1 MPU Setup Code ........................................................................................................... 30
2.4.2 80515 MPU Overview .................................................................................................... 30
2.4.3 Memory Organization and Addressing .......................................................................... 31
2.4.4 Special Function Registers (SFRs)................................................................................ 33
2.4.5 Generic 80515 Special Function Registers ................................................................... 34
2.4.6 Instruction Set ................................................................................................................ 36
2.4.7 UARTs ........................................................................................................................... 36
2.4.8 Timers and Counters ..................................................................................................... 38
2.4.9 WD Timer (Software Watchdog Timer) ......................................................................... 40
2.4.10 Interrupts ........................................................................................................................ 40
2.5 On-Chip Resources ................................................................................................................... 46
2.5.1 Physical Memory............................................................................................................ 46
2.5.2 Oscillator ........................................................................................................................ 48
2.5.3 PLL and Internal Clocks................................................................................................. 48
2.5.4 Real-Time Clock (RTC) ................................................................................................. 49
2.5.5 71M6545/H Temperature Sensor .................................................................................. 53
2.5.6 71M6xx3 Temperature Sensor ...................................................................................... 54
2.5.7 71M6545/H Battery Monitor ........................................................................................... 55
2.5.8 71M6xx3 VCC Monitor ................................................................................................... 55
2.5.9 UART Interface .............................................................................................................. 55
2.5.10 DIO Pins ......................................................................................................................... 55
2.5.11 EEPROM Interface ........................................................................................................ 57
2.5.12 SPI Slave Port................................................................................................................ 60
2.5.13 Hardware Watchdog Timer ............................................................................................ 64
2.5.14 Test Ports (TMUXOUT and TMUX2OUT Pins) ............................................................. 64
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71M6545/71M6545H Data Sheet
3
Functional Description ..................................................................................................................... 66
3.1 Theory of Operation ................................................................................................................... 66
3.2 SLP Mode (Sleep Mode)............................................................................................................ 66
3.3 Fault and Reset Behavior .......................................................................................................... 68
3.3.1 Events at Power-Down .................................................................................................. 68
3.3.2 Reset Sequence ............................................................................................................ 68
3.4 Data Flow and Host Communication ......................................................................................... 69
Application Information.................................................................................................................... 71
4.1 Connecting 5 V Devices............................................................................................................. 71
4.2 Directly Connected Sensors ...................................................................................................... 71
4.3 Systems Using 71M6xx3 Isolated Sensors and Current Shunts ............................................... 72
4.4 System Using Current Transformers ......................................................................................... 73
4.5 Metrology Temperature Compensation ..................................................................................... 74
4.5.1 Distinction Between Standard and High-Precision Parts .............................................. 74
4.5.2 Temperature Coefficients for the 71M6545 ................................................................... 75
4.5.3 Temperature Coefficients for the 71M6545H ................................................................ 75
4.5.4 Temperature Coefficients for the 71M6603 and 71M6103 (1% Energy Accuracy) ....... 75
4.5.5 Temperature Compensation for VREF and Shunt Sensors .......................................... 75
4.5.6 Temperature Compensation of VREF and Current Transformers................................. 77
4.6 Connecting I
2
C EEPROMs ........................................................................................................ 79
4.7 Connecting Three-Wire EEPROMs ........................................................................................... 79
4.8 UART (TX/RX) ........................................................................................................................... 79
4.9 Connecting the Reset Pin .......................................................................................................... 79
4.10 Connecting the Emulator Port Pins............................................................................................ 80
4.11 Flash Programming.................................................................................................................... 80
4.11.1 Flash Programming via the ICE Port ............................................................................. 80
4.11.2 Flash Programming via the SPI Port ............................................................................. 80
4.12 MPU Demonstration Code ......................................................................................................... 80
4.13 Crystal Oscillator ........................................................................................................................ 81
4.14 Meter Calibration ........................................................................................................................ 81
Firmware Interface ............................................................................................................................ 82
5.1 I/O RAM Map –Functional Order ............................................................................................... 82
5.2 I/O RAM Map – Alphabetical Order ........................................................................................... 88
5.3 Reading the Info Page (71M6545H only) .................................................................................. 98
5.4 CE Interface Description .......................................................................................................... 100
5.4.1 CE Program ................................................................................................................. 100
5.4.2 CE Data Format ........................................................................................................... 100
5.4.3 Constants ..................................................................................................................... 100
5.4.4 Environment ................................................................................................................. 101
5.4.5 CE Calculations ........................................................................................................... 101
5.4.6 CE Front End Data (Raw Data) ................................................................................... 102
5.4.7 CE Status and Control ................................................................................................. 103
5.4.8 CE Transfer Variables ................................................................................................. 105
5.4.9 Pulse Generation ......................................................................................................... 107
5.4.10 CE Calibration Parameters .......................................................................................... 110
5.4.11 CE Flow Diagrams ....................................................................................................... 111
4
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3
71M6545/71M6545H Data Sheet
6
PDS_6545_009
71M6545/H Specifications .............................................................................................................. 113
6.1 Absolute Maximum Ratings ..................................................................................................... 113
6.2 Recommended External Components ..................................................................................... 114
6.3 Recommended Operating Conditions...................................................................................... 114
6.4 Performance Specifications ..................................................................................................... 115
6.4.1 Input Logic Levels ........................................................................................................ 115
6.4.2 Output Logic Levels ..................................................................................................... 115
6.4.3 Battery Monitor............................................................................................................. 115
6.4.4 Temperature Monitor ................................................................................................... 116
6.4.5 Supply Current ............................................................................................................. 117
6.4.6 V3P3D Switch .............................................................................................................. 117
6.4.7 Internal Power Fault Comparators ............................................................................... 118
6.4.8 2.5 V Voltage Regulator – System Power ................................................................... 118
6.4.9 Crystal Oscillator .......................................................................................................... 118
6.4.10 Phase-Locked Loop (PLL) ........................................................................................... 119
6.4.11 71M6545/H VREF ........................................................................................................ 120
6.4.12 ADC Converter (71M6545/H) ...................................................................................... 121
6.4.13 Pre-Amplifier for IADC0-IADC1 ................................................................................... 122
6.5 Timing Specifications ............................................................................................................... 123
6.5.1 Flash Memory .............................................................................................................. 123
6.5.2 SPI Slave ..................................................................................................................... 123
6.5.3 EEPROM Interface ...................................................................................................... 123
6.5.4 RESET Pin ................................................................................................................... 124
6.5.5 Real-Time Clock (RTC) ............................................................................................... 124
6.6 64-Pin LQFP Package Outline Drawing .................................................................................. 125
6.7 71M6545/H Pinout ................................................................................................................... 126
6.8 71M6545/H Pin Descriptions ................................................................................................... 127
6.8.1 71M6545/H Power and Ground Pins ........................................................................... 127
6.8.2 71M6545/H Analog Pins .............................................................................................. 128
6.8.3 71M6545/H Digital Pins ............................................................................................... 129
6.8.4 I/O Equivalent Circuits ................................................................................................. 130
7
Ordering Information ...................................................................................................................... 131
7.1 71M6545/H Ordering Guide ..................................................................................................... 131
8
Related Information...................................................................................................................... 131
9
Contact Information ..................................................................................................................... 131
Appendix A: Acronyms .......................................................................................................................... 132
Appendix B: Revision History ............................................................................................................... 133
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71M6545/71M6545H Data Sheet
Figures
Figure 1: IC Functional Block Diagram ......................................................................................................... 9
Figure 2: AFE Block Diagram (Shunts: One-Local, Three-Remotes) ......................................................... 12
Figure 3. AFE Block Diagram (Four CTs) ................................................................................................... 13
Figure 4: States in a Multiplexer Frame (MUX_DIV[3:0] = 6) ..................................................................... 17
Figure 5: States in a Multiplexer Frame (MUX_DIV[3:0] = 7) ..................................................................... 17
Figure 6: General Topology of a Chopped Amplifier .................................................................................. 20
Figure 7: CROSS Signal with
CHOP_E
= 00 ............................................................................................... 21
Figure 8: RTM Timing ................................................................................................................................. 26
Figure 9. Pulse Generator FIFO Timing...................................................................................................... 28
Figure 10: Samples from Multiplexer Cycle (Frame) .................................................................................. 29
Figure 11: Accumulation Interval ................................................................................................................ 29
Figure 12: Interrupt Structure ...................................................................................................................... 45
Figure 13: Automatic Temperature Compensation ..................................................................................... 52
Figure 14: Connecting an External Load to DIO Pins ................................................................................. 57
Figure 15: 3-wire Interface. Write Command, HiZ=0. ................................................................................ 59
Figure 16: 3-wire Interface. Write Command, HiZ=1 ................................................................................. 59
Figure 17: 3-wire Interface. Read Command. ............................................................................................ 59
Figure 18: 3-Wire Interface. Write Command when CNT=0 ...................................................................... 59
Figure 19: 3-wire Interface. Write Command when HiZ=1 and WFR=1. ................................................... 59
Figure 20: SPI Slave Port - Typical Multi-Byte Read and Write operations................................................ 61
Figure 21: Voltage, Current, Momentary and Accumulated Energy ........................................................... 66
Figure 22: Data Flow ................................................................................................................................... 69
Figure 23: Resistive Voltage Divider (Voltage Sensing) ............................................................................. 71
Figure 24. CT with Single-Ended Input Connection (Current Sensing) ...................................................... 71
Figure 25: CT with Differential Input Connection (Current Sensing) .......................................................... 71
Figure 26: Differential Resistive Shunt Connections (Current Sensing) ..................................................... 71
Figure 27: System Using Three-Remotes and One-Local (Neutral) Sensor .............................................. 72
Figure 28. System Using Current Transformers ......................................................................................... 73
Figure 29: I
2
C EEPROM Connection .......................................................................................................... 79
Figure 30: Connections for the UART ......................................................................................................... 79
Figure 31: External Components for the RESET Pin: Push-Button (Left), Production Circuit (Right) ........ 80
Figure 32: External Components for the Emulator Interface ...................................................................... 80
Figure 33. Trim Fuse Bit Mapping ............................................................................................................... 98
Figure 34: CE Data Flow: Multiplexer and ADC........................................................................................ 111
Figure 35: CE Data Flow: Scaling, Gain Control, Intermediate Variables for one Phase ......................... 111
Figure 36: CE Data Flow: Squaring and Summation Stages.................................................................... 112
Figure 37: 64-pin LQFP Package Outline ................................................................................................. 125
Figure 38: Pinout for the LQFP-64 Package ............................................................................................. 126
Figure 39: I/O Equivalent Circuits ............................................................................................................. 130
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