(Above which the useful life may be impaired. For user
guidelines, not tested.)
Storage Temperature ........................ Com’l -55°C to +125°C
Ambient Temperature with
Power Applied.................................... Com’l -55°C to +125°C
DC Input Voltage ............................................–0.5V to +7.0V
DC Output Voltage..........................................–0.5V to +7.0V
DC Output Current
(Maximum Sink Current/Pin) ........................ –60 to +120 mA
Power Dissipation .......................................................... 1.0W
DIR
L
H
X
Outputs
Bus B Data to Bus A
Bus A Data to Bus B
High Z State
Range
Industrial
Static Discharge Voltage ........................................... >2001V
(per MIL-STD-883, Method 3015)
Function Table
[2]
Inputs
OE
L
L
H
Operating Range
Ambient
Temperature
–40°C to +85°C
V
CC
5V
±
10%
Notes:
1. On CY74FCT162H245T these pins have bus hold.
2. H = HIGH Voltage Level. L = LOW Voltage Level. X = Don’t Care. Z = High Impedance.
3. Operation beyond the limits set forth may impair the useful life of the device. Unless otherwise noted, these limits are over the operating free-air temperature range.
4. Unused inputs must always be connected to an appropriate logic voltage level, preferably either V
CC
or ground.
2
CY74FCT16245T/2245T
CY74FCT16445T/2H245
Electrical Characteristics
Over the Operating Range
Parameter
V
IH
V
IL
V
H
V
IK
I
IH
I
IL
I
BBH
I
BBL
I
BHHO
I
BHLO
I
OZH
I
OZL
I
OS
I
O
I
OFF
Description
Input HIGH Voltage
Input LOW Voltage
Input Hysteresis
[6]
Input Clamp Diode Voltage
Input HIGH Current
Input LOW Current
Standard
Bus Hold
Standard
Bus Hold
Bus Hold Sustain Current on Bus Hold Input
[7]
V
CC
=Min.
V
I
=2.0V
V
I
=0.8V
Bus Hold Overdrive Current on Bus Hold Input
[7]
V
CC
=Max., V
I
=1.5V
High Impedance Output Current
(Three-State Output pins)
High Impedance Output Current
(Three-State Output pins)
Short Circuit Current
[8]
Output Drive Current
[8]
Power-Off Disable
V
CC
=Max., V
OUT
=2.7V
V
CC
=Max., V
OUT
=0.5V
V
CC
=Max., V
OUT
=GND
V
CC
=Max., V
OUT
=2.5V
V
CC
=0V, V
OUT
≤4.5V
[9]
–80
–50
–140
–50
+50
TBD
±1
±1
–200
–180
±1
mA
µA
µA
mA
mA
µA
V
CC
=Max., V
I
=GND
V
CC
=Min., I
IN
=–18 mA
V
CC
=Max., V
I
=V
CC
100
–0.7
–1.2
±1
±100
±1
±100
µA
µA
µA
Test Conditions
Min.
2.0
0.8
Typ.
[5]
Max.
Unit
V
V
mV
V
µA
Output Drive Characteristics for CY74FCT16245T, CY74FCT16445T
Parameter
V
OH
Description
Output HIGH Voltage
Test Conditions
V
CC
=Min., I
OH
=–3 mA
V
CC
=Min., I
OH
=–15 mA
V
CC
=Min., I
OH
=–32 mA
V
OL
Output LOW Voltage
V
CC
=Min., I
OL
=64 mA
Min.
2.5
2.4
2.0
Typ.
[5]
3.5
3.5
3.0
0.2
0.55
Max.
Unit
V
V
V
V
Output Drive Characteristics for CY74FCT162245T, CY74FCT162H245T
Parameter
I
ODL
I
ODH
V
OH
V
OL
Description
Output LOW Current
[8]
Test Conditions
V
CC
=5V, V
IN
=V
IH
or V
IL
, V
OUT
=1.5V
V
CC
=5V, V
IN
=V
IH
or V
IL
, V
OUT
=1.5V
V
CC
=Min., I
OH
=–24 mA
V
CC
=Min., I
OL
=24 mA
Min.
60
–60
2.4
Typ.
[5]
115
–115
3.3
0.3
Max.
150
–150
0.55
Unit
mA
mA
V
V
Output HIGH Current
[8]
Output HIGH Voltage
Output LOW Voltage
Notes:
5. Typical values are at V
CC
=5.0V, T
A
=+25°C ambient.
6. This parameter is guaranteed but not tested.
7. Pins with bus hold are described in Pin Description.
8. Not more than one output should be shorted at a time. Duration of short should not exceed one second. The use of high-speed test apparatus and/or sample
and hold techniques are preferable in order to minimize internal chip heating and more accurately reflect operational values. Otherwise prolonged shorting of
a high output may raise the chip temperature well above normal and thereby cause invalid readings in other parametric tests. In any sequence of parameter
tests, I
OS
tests should be performed last.
9. Tested at +25°C.
3
CY74FCT16245T/2245T
CY74FCT16445T/2H245
Capacitance
[6]
(T
A
= +25°C, f = 1.0 MHz)
Parameter
C
IN
C
OUT
Description
Input Capacitance
Output Capacitance
V
IN
= 0V
V
OUT
= 0V
Test Conditions
Typ.
[5]
4.5
5.5
Max.
6.0
8.0
Unit
pF
pF
Power Supply Characteristics
Parameter
I
CC
∆I
CC
I
CCD
Description
Quiescent Power Supply Current V
CC
=Max.
Quiescent Power Supply Current V
CC
=Max.
(TTL inputs HIGH)
Dynamic Power Supply
Current
[11]
Total Power Supply Current
[12]
Test Conditions
V
IN
<0.2V,
V
IN
>V
CC
-0.2V
V
IN
=3.4V
[10]
Typ.
[5]
5
0.5
60
Max.
500
1.5
100
Unit
µA
mA
µA/MHz
V
CC
=Max., One Input Toggling, V
IN
=V
CC
or
50% Duty Cycle, Outputs Open, V
IN
=GND
OE=DIR=GND
V
CC
=Max., f
1
=10 MHz,
V
IN
=V
CC
or
50% Duty Cycle, Outputs Open, V
IN
=GND
One Bit Toggling,
V
IN
=3.4V or
OE=DIR=GND
V
IN
=GND
V
CC
=Max., f
1
=2.5 MHz, 50%
Duty Cycle, Outputs Open,
Sixteen Bits Toggling,
OE=DIR=GND
V
IN
=V
CC
or
V
IN
=GND
V
IN
=3.4V or
V
IN
=GND
I
C
0.6
0.9
2.4
6.4
1.5
2.3
4.5
[13]
16.5
[13]
mA
mA
mA
mA
Notes:
10. Per TTL driven input (V
IN
=3.4V); all other inputs at V
CC
or GND.
11. This parameter is not directly testable, but is derived for use in Total Power Supply calculations.
= I
QUIESCENT
+ I
INPUTS
+ I
DYNAMIC
12. I
C
I
C
= I
CC
+∆I
CC
D
H
N
T
+I
CCD
(f
0
/2 + f
1
N
1
)
I
CC
= Quiescent Current with CMOS input levels
∆I
CC
= Power Supply Current for a TTL HIGH input (V
IN
=3.4V)
D
H
= Duty Cycle for TTL inputs HIGH
N
T
= Number of TTL inputs at D
H
I
CCD
= Dynamic Current caused by an input transition pair (HLH or LHL)
f
0
= Clock frequency for registered devices, otherwise zero
= Input signal frequency
f
1
N
1
= Number of inputs changing at f
1
All currents are in milliamps and all frequencies are in megahertz.
13. Values for these conditions are examples of the I
CC
formula. These limits are guaranteed but not tested.
4
CY74FCT16245T/2245T
CY74FCT16445T/2H245
]
Switching Characteristics
Over the Operating Range
[14]
74FCT16245T
74FCT162245T
74FCT16445T
74FCT162H245T
Parameter
t
PLH
t
PHL
t
PZH
t
PZL
t
PHZ
t
PLZ
t
PZH
t
PZL
t
PHZ
t
PLZ
t
SK(O)
Description
Propagation Delay Data to Output
A to B, B to A
Output Enable Time
OE to A or B
Output Disable Time
OE to A or B
Output Enable Time
DIR to A or B
Output Disable Time
DIR to A or B
Output Skew
[16]
Min.
1.5
1.5
1.5
1.5
1.5
Max.
7.0
9.5
7.5
9.5
7.5
0.5
74FCT16245CT
74FCT162245CT
74FCT16445CT
74FCT162H245CT
Parameter
t
PLH
t
PHL
t
PZH
t
PZL
t
PHZ
t
PLZ
t
PZH
t
PZL
t
PHZ
t
PLZ
t
SK(O)
Description
Propagation Delay Data to Output
A to B, B to A
Output Enable Time
OE to A or B
Output Disable Time
OE to A or B
Output Enable Time
DIR to A or B
Output Disable Time
DIR to A or B
Output Skew
[16]
Min.
1.5
1.5
1.5
1.5
1.5
Max.
4.1
5.8
4.8
5.8
4.8
0.5
74FCT16245AT
74FCT162245AT
74FCT16445AT
74FCT162H245AT
Min.
1.5
1.5
1.5
1.5
1.5
Max.
4.5
6.2
5.0
6.2
5.0
0.5
Unit
ns
ns
ns
ns
ns
ns
Fig.
No.
[15]
1, 3
1, 7, 8
1, 7, 8
1, 7, 8
1, 7, 8
—
74FCT16245ET
74FCT162245ET
74FCT162H245ET
Min.
1.5
1.5
1.5
1.5
1.5
Max.
3.2
4.4
4.0
4.8
4.0
0.5
Unit
ns
ns
ns
ns
ns
ns
Fig.
No.
[15]
1, 3
1, 7, 8
1, 7, 8
1, 7, 8
1, 7, 8
—
Note:
14. Minimum limits are guaranteed but not tested on Propagation Delays.
15. See “Parameter Measurement Information” in the General Information section.
16. Skew between any two outputs of the same package switching in the same direction. This parameter is guaranteed by design.
Logic analyzers are widely used tools in digital design verification and debugging. They can verify the proper functioning of digital circuits and help users identify and troubleshoot faults. They ...[详细]
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