IDT74FCT157AT/CT/DT
FAST CMOS QUAD 2-INPUT MULTIPLEXER
INDUSTRIAL TEMPERATURE RANGE
FAST CMOS
QUAD 2-INPUT
MULTIPLEXER
FEATURES:
•
•
•
•
A, C, and D grades
Low input and output leakage
≤
1µA (max.)
CMOS power levels
True TTL input and output compatibility:
– V
OH
= 3.3V (typ.)
– V
OL
= 0.3V (typ.)
High Drive outputs (-15mA I
OH
, 48mA I
OL
)
Meets or exceeds JEDEC standard 18 specifications
Power off disable outputs permit "live insertion"
Available in SOIC and QSOP packages
IDT74FCT157AT/CT/DT
DESCRIPTION:
The FCT157T is a high-speed quad 2-input multiplexer built using an
advanced dual metal CMOS technology. Four bits of data from two sources
can be selected using the common select input. The four buffered outputs
present the selected data in the true (non-inverting) form.
The FCT157T has a common, active-low, enable input. When the
enable input is not active, all four outputs are held low. A common application
of FCT157T is to move data from two different groups of registers to a
common bus. Another application is as a function generator. The FCT157T
can generate any four of the 16 different functions of two variables with one
variable common.
•
•
•
•
FUNCTIONAL BLOCK DIAGRAM
S
E
Three other multiplexers
I
1B
I
1D
I
0B
I
0D
Z
B
Z
D
I
1A
I
0A
Z
A
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
INDUSTRIAL TEMPERATURE RANGE
1
© 2009 Integrated Device Technology, Inc.
AUGUST 2009
DSC-5502/6
IDT74FCT157AT/CT/DT
FAST CMOS QUAD 2-INPUT MULTIPLEXER
INDUSTRIAL TEMPERATURE RANGE
PIN CONFIGURATION
ABSOLUTE MAXIMUM RATINGS
(1)
Symbol
V
TERM
(2)
V
TERM
(3)
Description
Terminal Voltage with Respect to GND
Terminal Voltage with Respect to GND
Storage Temperature
DC Output Current
Max
–0.5 to +7
–0.5 to V
CC
+0.5
–65 to +150
–60 to +120
Unit
V
V
°C
mA
S
I
0A
I
1A
Z
A
I
0B
I
1B
Z
B
GND
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
V
CC
E
I
0C
I
1C
Z
C
I
0D
I
1D
Z
D
T
STG
I
OUT
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability. No terminal voltage may exceed
Vcc by +0.5V unless otherwise noted.
2. Inputs and Vcc terminals only.
3. Output and I/O terminals only.
CAPACITANCE
(T
A
= +25°C, F = 1.0MHz)
Symbol
C
IN
C
OUT
Parameter
(1)
Input Capacitance
Output Capacitance
Conditions
V
IN
= 0V
V
OUT
= 0V
Typ.
6
8
Max.
10
12
Unit
pF
pF
NOTE:
1. This parameter is measured at characterization but not tested.
SOIC/ QSOP
TOP VIEW
PIN DESCRIPTION
Pin Names
I
0A
- I
0D
I
1A
- I
1D
E
S
Z
A
- Z
D
Description
Source 0 Data Inputs
Source 1 Data Inputs
Enable Input (Active LOW)
Select Input
Outputs
FUNCTION TABLE
(1)
Inputs
E
H
L
L
L
L
S
X
H
H
L
L
I
0
X
X
X
L
H
I
1
X
L
H
X
X
Outputs
Z
x
L
L
H
L
H
NOTE:
1. H = HIGH Voltage Level
X = Don’t Care
L = LOW Voltage Level
Z = High Impedance
2
IDT74FCT157AT/CT/DT
FAST CMOS QUAD 2-INPUT MULTIPLEXER
INDUSTRIAL TEMPERATURE RANGE
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified:
Industrial: T
A
= –40°C to +85°C, V
CC
= 5.0V ±5%
Symbol
V
IH
V
IL
I
IH
I
IL
I
OZH
I
OZL
I
I
V
IK
V
H
I
CC
Input HIGH Current
(4)
Clamp Diode Voltage
Input Hysteresis
Quiescent Power Supply Current
V
CC
= Max.
V
IN
= GND or V
CC
V
CC
= Max., V
I
= V
CC
(Max.)
V
CC
= Min., I
IN
= –18mA
—
Parameter
Input HIGH Level
Input LOW Level
Input HIGH Current
(4)
Input LOW Current
(4)
High Impedance Output Current
(4)
Test Conditions
(1)
Guaranteed Logic HIGH Level
Guaranteed Logic LOW Level
V
CC
= Max.
V
CC
= Max.
V
CC
= Max., V
I
= V
CC
(Max.)
V
I
= 2.7V
V
I
= 0.5V
V
I
= 2.7V
V
I
= 0.5V
Min.
2
—
—
—
—
—
—
—
—
—
Typ.
(2)
—
—
—
—
—
—
—
–0.7
200
0.01
Max.
—
0.8
±1
±1
±1
±1
±1
–1.2
—
1
µA
V
mV
mA
Unit
V
V
µA
µA
µA
OUTPUT DRIVE CHARACTERISTICS
Symbol
V
OH
V
OL
I
OS
I
OFF
Parameter
Output HIGH Voltage
Output LOW Voltage
Short Circuit Current
Input/Output Power Off Leakage
(5)
V
CC
= Min
V
IN
= V
IH
or V
IL
V
CC
= Min
V
IN
= V
IH
or V
IL
V
CC
= Max., V
O
= GND
(3)
Test Conditions
(1)
I
OH
= –8mA
I
OH
= –15mA
I
OL
= 48mA
Min.
2.4
2
—
–60
—
Typ.
(2)
3.3
3
0.3
–120
—
Max.
—
—
0.5
–225
±1
Unit
V
V
mA
µA
V
CC
= 0V, V
IN
or V
O
≤
4.5V
NOTES:
1. For conditions shown as Min. or Max., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at V
CC
= 5.0V, +25°C ambient.
3. Not more than one output should be tested at one time. Duration of the test should not exceed one second.
4. The test limit for this parameter is ±5µA at T
A
= –55°C.
5. This parameter is guaranteed but not tested.
3
IDT74FCT157AT/CT/DT
FAST CMOS QUAD 2-INPUT MULTIPLEXER
INDUSTRIAL TEMPERATURE RANGE
POWER SUPPLY CHARACTERISTICS
Symbol
ΔI
CC
I
CCD
Parameter
Quiescent Power Supply Current
TTL Inputs HIGH
Dynamic Power Supply
Current
(4)
V
CC
= Max.
V
IN
= 3.4V
(3)
V
CC
= Max.
Outputs Open
E
= GND
One Input Toggling
50% Duty Cycle
I
C
Total Power Supply Current
(6)
V
CC
= Max.
Outputs Open
fo = 10MHz
50% Duty Cycle
E
= GND
One Bit Toggling
V
CC
= Max.
Outputs Open
fo = 2.5MHz
50% Duty Cycle
E
= GND
Four Bits Toggling
V
IN
= V
CC
V
IN
= GND
V
IN
= 3.4V
V
IN
= GND
V
IN
= V
CC
V
IN
= GND
V
IN
= 3.4V
V
IN
= GND
—
1.5
3.5
mA
V
IN
= V
CC
V
IN
= GND
Test Conditions
(1)
Min.
—
—
Typ.
(2)
0.5
0.15
Max.
2
0.25
Unit
mA
mA/
MHz
—
1.8
4.5
—
1.5
3.5
(5)
mA
—
2.5
7.5
(5)
NOTES:
1. For conditions shown as Min. or Max., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at V
CC
= 5.0V, +25°C ambient.
3. Per TTL driven input (V
IN
= 3.4V). All other inputs at V
CC
or GND.
4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations.
5. Values for these conditions are examples of
ΔI
CC
formula. These limits are guaranteed but not tested.
6. I
C
= I
QUIESCENT
+ I
INPUTS
+ I
DYNAMIC
I
C
= I
CC
+
ΔI
CC
D
H
N
T
+ I
CCD
(f
O
N
O
)
I
CC
= Quiescent Current
ΔI
CC
= Power Supply Current for a TTL High Input (V
IN
= 3.4V)
D
H
= Duty Cycle for TTL Inputs High
N
T
= Number of TTL Inputs at D
H
I
CCD
= Dynamic Current caused by an Input Transition Pair (HLH or LHL)
f
O
= Output Frequency
N
O
= Number of Outputs at f
O
All currents are in milliamps and all frequencies are in megahertz.
SWITCHING CHARACTERISTICS OVER OPERATING RANGE
IDT74FCT151AT
Symbol
t
PLH
t
PHL
t
PLH
t
PHL
t
PLH
t
PHL
Parameter
Propagation Delay
Ix to Zx
Propagation Delay
E
to Zx
Propagation Delay
S to Zx
Condition
(1)
C
L
= 50pF
R
L
= 500Ω
Min.
(2)
1.5
1.5
1.5
Max.
5
6
7
IDT74FCT151CT
Min.
(2)
1.5
1.5
1.5
Max.
4.3
4.8
5.2
IDT74FCT151DT
Min.
(2)
1.5
1.5
1.5
Max.
3.9
4.4
4.6
Unit
ns
ns
ns
NOTES:
1. See test circuit and waveforms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
4
IDT74FCT157AT/CT/DT
FAST CMOS QUAD 2-INPUT MULTIPLEXER
INDUSTRIAL TEMPERATURE RANGE
TEST CIRCUITS AND WAVEFORMS
V
CC
500W
V
IN
Pulse
Generator
R
T
D.U.T
.
V
OUT
7.0V
SWITCH POSITION
Test
Open Drain
Disable Low
Enable Low
All Other Tests
Switch
Closed
Open
50pF
C
L
500W
DEFINITIONS:
C
L
= Load capacitance: includes jig and probe capacitance.
R
T
= Termination resistance: should be equal to Z
OUT
of the Pulse Generator.
Octal Link
Test Circuits for All Outputs
DATA
INPUT
TIMING
INPUT
ASYNCHRONOUS CONTROL
PRESET
CLEAR
ETC.
SYNCHRONOUS CONTROL
PRESET
CLEAR
CLOCK ENABLE
ETC.
t
SU
t
H
t
REM
3V
1.5V
0V
3V
1.5V
0V
3V
1.5V
0V
3V
1.5V
0V
LOW-HIGH-LOW
PULSE
t
W
HIGH-LOW-HIGH
PULSE
1.5V
1.5V
t
SU
t
H
Pulse Width
Octal Link
Octal Link
Set-Up, Hold, and Release Times
ENABLE
SAME PHASE
INPUT TRANSITION
t
PLH
OUTPUT
t
PLH
OPPOSITE PHASE
INPUT TRANSITION
t
PHL
t
PHL
3V
1.5V
0V
V
OH
1.5V
V
OL
3V
1.5V
0V
CONTROL
INPUT
t
PZL
OUTPUT
NORMALLY
LOW
OUTPUT
NORMALLY
HIGH
SWITCH
CLOSED
t
PZH
SWITCH
OPEN
1.5V
0V
3.5V
1.5V
DISABLE
3V
1.5V
0V
3.5V
0.3V
t
PHZ
0.3V
V
OH
0V
Octal Link
t
PLZ
V
OL
Octal Link
Propagation Delay
Enable and Disable Times
NOTES:
1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH.
2. Pulse Generator for All Pulses: Rate
≤
1.0MHz; t
F
≤
2.5ns; t
R
≤
2.5ns.
5
FPGA/CPLD
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