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7205L25PG

产品描述FIFO, 8KX9, 25ns, Asynchronous, CMOS, PDIP28, PLASTIC, DIP-28
产品类别存储    存储   
文件大小147KB,共14页
制造商IDT (Integrated Device Technology)
标准
下载文档 详细参数 全文预览

7205L25PG概述

FIFO, 8KX9, 25ns, Asynchronous, CMOS, PDIP28, PLASTIC, DIP-28

7205L25PG规格参数

参数名称属性值
是否无铅不含铅
是否Rohs认证符合
厂商名称IDT (Integrated Device Technology)
零件包装代码DIP
包装说明PLASTIC, DIP-28
针数28
Reach Compliance Codecompliant
ECCN代码EAR99
最长访问时间25 ns
其他特性RETRANSMIT
周期时间35 ns
JESD-30 代码R-PDIP-T28
JESD-609代码e3
长度36.576 mm
内存密度73728 bit
内存宽度9
功能数量1
端子数量28
字数8192 words
字数代码8000
工作模式ASYNCHRONOUS
最高工作温度70 °C
最低工作温度
组织8KX9
可输出NO
封装主体材料PLASTIC/EPOXY
封装代码DIP
封装形状RECTANGULAR
封装形式IN-LINE
并行/串行PARALLEL
峰值回流温度(摄氏度)260
认证状态Not Qualified
座面最大高度4.699 mm
最大供电电压 (Vsup)5.5 V
最小供电电压 (Vsup)4.5 V
标称供电电压 (Vsup)5 V
表面贴装NO
技术CMOS
温度等级COMMERCIAL
端子面层MATTE TIN
端子形式THROUGH-HOLE
端子节距2.54 mm
端子位置DUAL
处于峰值回流温度下的最长时间30
宽度15.24 mm
Base Number Matches1

文档预览

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CMOS ASYNCHRONOUS FIFO
2,048 x 9, 4,096 x 9
8,192 x 9, 16,384 x 9
32,768 x 9 and 65,536 x 9
IDT7203
IDT7204
IDT7205
IDT7206
IDT7207
IDT7208
FEATURES:
First-In/First-Out Dual-Port memory
2,048 x 9 organization (IDT7203)
4,096 x 9 organization (IDT7204)
8,192 x 9 organization (IDT7205)
16,384 x 9 organization (IDT7206)
32,768 x 9 organization (IDT7207)
65,636 x 9 organization (IDT7208)
High-speed: 12ns access time
Low power consumption
— Active: 660mW (max.)
— Power-down: 44mW (max.)
Asynchronous and simultaneous read and write
Fully expandable in both word depth and width
Pin and functionally compatible with IDT720X family
Status Flags: Empty, Half-Full, Full
Retransmit capability
High-performance CMOS technology
Military product compliant to MIL-STD-883, Class B
Standard Military Drawing for #5962-88669 (IDT7203), 5962-89567
(IDT7203), and 5962-89568 (IDT7204) are listed on this function
Industrial temperature range (–40°C to +85°C) is available
(plastic packages only)
DESCRIPTION:
The IDT7203/7204/7205/7206/7207/7208 are dual-port memory buffers
with internal pointers that load and empty data on a first-in/first-out basis. The
device uses Full and Empty flags to prevent data overflow and underflow and
expansion logic to allow for unlimited expansion capability in both word size and
depth.
Data is toggled in and out of the device through the use of the Write (W) and
Read (R) pins.
The device's 9-bit width provides a bit for a control or parity at the user’s
option. It also features a Retransmit (RT) capability that allows the read pointer
to be reset to its initial position when
RT
is pulsed LOW. A Half-Full Flag is
available in the single device and width expansion modes.
These FIFOs are fabricated using IDT’s high-speed CMOS technology.
They are designed for applications requiring asynchronous and simultaneous
read/writes in multiprocessing, rate buffering and other applications.
Military grade product is manufactured in compliance with the latest revision
of MIL-STD-883, Class B.
FUNCTIONAL BLOCK DIAGRAM
DATA INPUTS
(D
0
-D
8
)
W
WRITE
CONTROL
WRITE
POINTER
RAM ARRAY
2,048 x 9
4,096 x 9
8,192 x 9
16,384 x 9
32,768 x 9
65,536 x 9
READ
POINTER
THREE-
STATE
BUFFERS
R
READ
CONTROL
FLAG
LOGIC
DATA OUTPUTS
(Q
0
-Q
8
)
RS
RESET
LOGIC
FL/RT
EF
FF
XI
IDT and the IDT logo are trademarks of Integrated Device Technology, Inc.
EXPANSION
LOGIC
XO/HF
2661 drw01
COMMERCIAL, MILITARY AND INDUSTRIAL TEMPERATURE RANGES
1
2002 Integrated Device Technology, Inc. All rights reserved. Product subject to change without notice.
SEPTEMBER 2002
DSC-2661/14
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