The data output functions may be enabled or disabled by various signals at OEAB or OEBA inputs. Data input functions are always enabled, i.e.,
data at the bus pins will be stored on every LOW-to-HIGH transition on the clock inputs. This also applies to data I/O (A and B: 8–15) and #2 control pins.
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2
74LCX16652
Functional Description
In the transceiver mode, data present at the HIGH imped-
ance port may be stored in either the A or B register or
both.
The select (SAB
n
, SBA
n
) controls can multiplex stored and
real-time.
The examples below demonstrate the four fundamental
bus-management functions that can be performed with the
74LCX16652.
Data on the A or B data bus, or both can be stored in the
internal D flip-flop by LOW-to-HIGH transitions at the
appropriate Clock Inputs (CPAB
n
, CPBA
n
) regardless of
the Select or Output Enable Inputs. When SAB and SBA
are in the real time transfer mode, it is also possible to
store data without using the internal D flip-flops by simulta-
neously enabling OEAB
n
and OEBA
n
. In this configuration
each Output reinforces its Input. Thus when all other data
sources to the two sets of bus lines are in a HIGH imped-
ance state, each set of bus lines will remain at its last state.
Real-Time
Transfer Bus B to Bus A
Real-Time
Transfer Bus A to Bus B
OEAB
1
OEBA
1
CPAB
1
CPBA
1
SAB
1
SBA
1
L
L
X
X
X
L
OEAB
1
OEBA
1
CPAB
1
CPBA
1
SAB
1
SBA
1
H
H
X
X
L
X
Transfer Storage
Data to A or B
Storage
OEAB
1
OEBA
1
CPAB
1
CPBA
1
SAB
1
SBA
1
H
L
H or L
H or L
H
H
OEAB
1
OEBA
1
CPAB
1
CPBA
1
SAB
1
SBA
1
X
L
L
H
X
H
X
X
X
X
X
X
X
X
3
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74LCX16652
Logic Diagram
Please note that these diagrams are provided only for the understanding of logic operations and should not be used to estimate propagation delays.
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