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74LCX16543MTDX_NL

产品描述Registered Bus Transceiver, LVC/LCX/Z Series, 2-Func, 8-Bit, True Output, CMOS, PDSO56, 6.10 MM, MO-153, TSSOP-56
产品类别逻辑    逻辑   
文件大小90KB,共9页
制造商Fairchild
官网地址http://www.fairchildsemi.com/
标准
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74LCX16543MTDX_NL概述

Registered Bus Transceiver, LVC/LCX/Z Series, 2-Func, 8-Bit, True Output, CMOS, PDSO56, 6.10 MM, MO-153, TSSOP-56

74LCX16543MTDX_NL规格参数

参数名称属性值
是否Rohs认证符合
厂商名称Fairchild
零件包装代码TSSOP
包装说明TSSOP, TSSOP56,.3,20
针数56
Reach Compliance Codecompliant
其他特性WITH INDEPENDENT OUTPUT ENABLE FOR EACH DIRECTION
控制类型INDEPENDENT CONTROL
计数方向BIDIRECTIONAL
系列LVC/LCX/Z
JESD-30 代码R-PDSO-G56
JESD-609代码e3
长度14 mm
负载电容(CL)50 pF
逻辑集成电路类型REGISTERED BUS TRANSCEIVER
最大I(ol)0.024 A
湿度敏感等级2
位数8
功能数量2
端口数量2
端子数量56
最高工作温度85 °C
最低工作温度-40 °C
输出特性3-STATE
输出极性TRUE
封装主体材料PLASTIC/EPOXY
封装代码TSSOP
封装等效代码TSSOP56,.3,20
封装形状RECTANGULAR
封装形式SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
包装方法TAPE AND REEL
峰值回流温度(摄氏度)260
电源3.3 V
Prop。Delay @ Nom-Sup5.2 ns
传播延迟(tpd)7.8 ns
认证状态Not Qualified
座面最大高度1.2 mm
最大供电电压 (Vsup)3.6 V
最小供电电压 (Vsup)2 V
标称供电电压 (Vsup)2.5 V
表面贴装YES
技术CMOS
温度等级INDUSTRIAL
端子面层Matte Tin (Sn)
端子形式GULL WING
端子节距0.5 mm
端子位置DUAL
处于峰值回流温度下的最长时间NOT SPECIFIED
翻译N/A
宽度6.1 mm
Base Number Matches1

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74LCX16543 Low Voltage 16-Bit Registered Transceiver with 5V Tolerant Inputs and Outputs
May 1995
Revised April 2001
74LCX16543
Low Voltage 16-Bit Registered Transceiver
with 5V Tolerant Inputs and Outputs
General Description
The LCX16543 contains sixteen non-inverting transceivers
containing two sets of D-type registers for temporary stor-
age of data flowing in either direction. Each byte has sepa-
rate control inputs which can be shorted together for full
16-bit operation. Separate Latch Enable and Output
Enable inputs are provided for each register to permit inde-
pendent input and output control in either direction of data
flow.
The LCX16543 is designed for low voltage (2.5V or 3.3V)
V
CC
applications with capability of interfacing to a 5V signal
environment.
The LCX16543 is fabricated with an advanced CMOS tech-
nology to achieve high speed operation while maintaining
CMOS low power dissipation.
Features
s
5V tolerant inputs and outputs
s
2.3V–3.6V V
CC
specifications provided
s
5.2 ns t
PD
max (V
CC
=
3.3V), 20
µ
A I
CC
max
s
Power down high impedance inputs and outputs
s
Supports live insertion/withdrawal (Note 1)
s
±
24 mA Output Drive (V
CC
=
3.0V)
s
Implements patented noise/EMI reduction circuitry
s
Latch-up performance exceeds 500 mA
s
ESD performance:
Human Body Model
>
2000V
Machine Model
>
200V
Note 1:
To ensure the high-impedance state during power up or down, OE
should be tied to V
CC
through a pull-up resistor: the minimum value or the
resistor is determined by the current-sourcing capability of the driver.
Ordering Code:
Order Number
74LCX16543MEA
74LCX16543MTD
Package Number
MS56A
MTD56
Package Description
56-Lead Shrink Small Outline Package (SSOP), JEDEC MO-118, 0.300 Wide
56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagram
Logic Symbol
© 2001 Fairchild Semiconductor Corporation
DS012464
www.fairchildsemi.com

 
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