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INTEGRATED CIRCUITS
DATA SHEET
For a complete data sheet, please also download:
•
The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications
•
The IC06 74HC/HCT/HCU/HCMOS Logic Package Information
•
The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines
74HC/HCT9115
Nine wide Schmitt trigger buffer;
open drain outputs
Product specification
Supersedes data of March 1988
File under Integrated Circuits, IC06
December 1990
Philips Semiconductors
Product specification
Nine wide Schmitt trigger buffer;
open drain outputs
FEATURES
•
Schmitt trigger action on all data inputs
•
Output capability: standard (open drain)
•
I
CC
category: MSI
GENERAL DESCRIPTION
The 74HC/HCT9115 are high-speed Si-gate CMOS
devices and are pin compatible with low power Schottky
TTL (LSTTL). They are specified in compliance with
JEDEC standard no. 7A.
The 74HC/HCT9115 are nine wide Schmitt trigger buffer
with open drain outputs and Schmitt trigger inputs.
74HC/HCT9115
The Schmitt trigger action in the data inputs transform
slowly changing input signals into sharply defined
jitter-free output signals.
The 74HC/HCT9115 have open-drain N-transistor
outputs, which are not clamped by a diode connected to
V
CC
. In the OFF-state, i.e. when one input is HIGH, the
output may be pulled to any voltage between GND and
V
Omax
. This allows the device to be used as a
LOW-to-HIGH or HIGH-to-LOW level shifter. For digital
operation and OR-tied output applications, these devices
must have a pull-up resistor to establish a logic HIGH level.
The “9115” is identical to the “9114” but has non-inverting
outputs.
QUICK REFERENCE DATA
GND = 0 V; T
amb
= 25
°C;
t
r
= t
f
= 6 ns
TYPICAL
SYMBOL
t
PHL
/ t
PLZ
C
I
C
PD
Notes
1. C
PD
is used to determine the dynamic power dissipation (P
D
in
µW):
P
D
= C
PD
×
V
CC2
×
f
i
+ ∑
(C
L
×
V
CC2
×
f
o
) where:
f
i
= input frequency in MHz
f
o
= output frequency in MHz
∑
(C
L
×
V
CC2
×
f
o
) = sum of outputs
C
L
= output load capacitance in pF
V
CC
= supply voltage in V
2. For HC the condition is V
I
= GND to V
CC
For HCT the condition is V
I
= GND to V
CC
−
1.5 V
ORDERING INFORMATION
See
“74HC/HCT/HCU/HCMOS Logic Package Information”.
PARAMETER
propagation delay A
n
to Y
n
input capacitance
power dissipation capacitance per buffer
notes 1 and 2
CONDITIONS
HC
C
L
= 15 pF; V
CC
= 5 V
12
3.5
5
HCT
13
3.5
5
ns
pF
pF
UNIT
December 1990
2
Philips Semiconductors
Product specification
Nine wide Schmitt trigger buffer;
open drain outputs
PIN DESCRIPTION
PIN NO.
1, 2, 3, 4, 5, 6, 7, 8, 9
10
19, 18, 17, 16, 15, 14, 13, 12, 11
20
SYMBOL
A
0
to A
8
GND
Y
0
to Y
8
V
CC
NAME AND FUNCTION
data inputs
ground (0 V)
data outputs
positive supply voltage
74HC/HCT9115
alfpage
1
A0
Y0
fpage
19
1
19
2
A1
Y1
18
2
18
3
A2
Y2
17
3
17
4
A3
Y3
16
4
16
5
A4
Y4
15
5
15
6
A5
Y5
14
6
14
7
A6
Y6
13
7
13
8
A7
Y7
12
8
12
9
A8
Y8
MBA016
11
9
MBA013
11
Fig.1 Pin configuration.
Fig.2 Logic diagram.
Fig.3 IEC logic diagram.
December 1990
3
Philips Semiconductors
Product specification
Nine wide Schmitt trigger buffer;
open drain outputs
74HC/HCT9115
handbook, halfpage
Yn
An
GND
MBA022
Fig.4 Functional diagram.
Fig.5 Logic diagram (one Schmitt trigger).
FUNCTION TABLE
INPUTS
A
n
L
H
Notes
1. H = HIGH voltage level
L = LOW voltage level
Z = high impedance OFF-state
OUTPUTS
Y
n
L
Z
December 1990
4
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