74F821 10-Bit D-Type Flip-Flop
April 1988
Revised October 2000
74F821
10-Bit D-Type Flip-Flop
General Description
The 74F821 is a 10-bit D-type flip-flop with 3-STATE true
outputs arranged in a broadside pinout.
Features
s
3-STATE Outputs
Ordering Code:
Order Number
74F821SC
74F821SPC
Package Number
M24B
N24C
Package Description
24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbols
Connection Diagram
IEEE/IEC
© 2000 Fairchild Semiconductor Corporation
DS009595
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74F821
Unit Loading/Fan Out
Pin Names
D
0
–D
9
OE
CP
O
0
–O
9
Description
Data Inputs
Output Enable
3-STATE Input
Clock Input
3-STATE Outputs
1.0/1.0
150/40 (33.3)
20
µ
A/
−
0.6 mA
U.L.
HIGH/LOW
1.0/1.0
1.0/1.0
Input I
IH
/I
IL
Output I
OH
/I
OL
20
µ
A/
−
0.6 mA
20
µ
A/
−
0.6 mA
−
3.0 mA/24 mA (20 mA)
Functional Description
The 74F821 consists of ten D-type edge-triggered flip-
flops. This device has 3-STATE true outputs for bus sys-
tems organized in a broadside pinning. The buffered Clock
(CP) and buffered Output Enable (OE) are common to all
flip-flops. The flip-flops will store the state of their individual
D inputs that meet the setup and hold times requirements
on the LOW-to-HIGH CP transition. With the OE LOW the
content of the flip-flops are available at the outputs. When
the OE is HIGH, the outputs go to the high impedance
state. Operation of the OE input does not affect the state of
the flip-flops.
Function Table
Inputs
OE
H
H
H
H
L
L
L
L
CP
H
D
X
X
L
H
L
H
X
X
Internal Output
Function
Q
NC
NC
H
L
H
L
NC
NC
O
Z
Z
Z
Z
L
H
NC
NC
Hold
Hold
Load
Load
Data Available
Data Available
No Change in Data
No Change in Data
L
H
L
Logic Diagram
L
=
LOW Voltage Level
H
=
HIGH Voltage Level
X
=
Immaterial
Z
=
High Impedance
=
LOW-to-HIGH Transition
NC
=
No Change
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
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2
74F821
Absolute Maximum Ratings
(Note 1)
Storage Temperature
Ambient Temperature under Bias
Junction Temperature under Bias
V
CC
Pin Potential to Ground Pin
Input Voltage (Note 2)
Input Current (Note 2)
Voltage Applied to Output
in HIGH State (with V
CC
=
0V)
Standard Output
3-STATE Output
Current Applied to Output
in LOW State (Max)
twice the rated I
OL
(mA)
−
65
°
C to
+
150
°
C
−
55
°
C to
+
125
°
C
−
55
°
C to
+
150
°
C
−
0.5V to
+
7.0V
−
0.5V to
+
7.0V
−
30 mA to
+
5.0 mA
Recommended Operating
Conditions
Free Air Ambient Temperature
Supply Voltage
0
°
C to
+
70
°
C
+
4.5V to
+
5.5V
−
0.5V to V
CC
−
0.5V to
+
5.5V
Note 1:
Absolute maximum ratings are values beyond which the device
may be damaged or have its useful life impaired. Functional operation
under these conditions is not implied.
Note 2:
Either voltage limit or current limit is sufficient to protect inputs.
DC Electrical Characteristics
Symbol
V
IH
V
IL
V
CD
V
OH
Parameter
Input HIGH Voltage
Input LOW Voltage
Input Clamp Diode Voltage
Output HIGH
Voltage
10% V
CC
10% V
CC
5% V
CC
5% V
CC
V
OL
I
IH
I
BVI
I
CEX
V
ID
I
OD
I
IL
I
OZH
I
OZL
I
OS
I
CCZ
Output LOW Voltage
Input HIGH Current
Input HIGH Current
Breakdown Test
Output HIGH
Leakage Current
Input Leakage
Test
Output Leakage
Circuit Current
Input LOW Current
Output Leakage Current
Output Leakage Current
Output Short-Circuit Current
Power Supply Current
−60
78
4.75
3.75
−0.6
50
−50
−150
100
10% V
CC
2.5
2.4
2.7
2.7
0.5
5.0
7.0
50
V
µA
µA
µA
V
µA
mA
µA
µA
mA
mA
Min
Max
Max
Max
0.0
0.0
Max
Max
Max
Max
Max
V
Min
Min
2.0
0.8
−1.2
Typ
Max
Units
V
V
V
Min
V
CC
Conditions
Recognized as a HIGH Signal
Recognized as a LOW Signal
I
IN
= −18
mA
I
OH
= −1
mA
I
OH
= −3
mA
I
OH
= −1
mA
I
OH
= −3
mA
I
OL
=
24 mA
V
IN
=
2.7V
V
IN
=
7.0V
V
OUT
=
V
CC
I
ID
=
1.9
µA,
All Other Pins Grounded
V
IOD
=
150 mV
All Other Pins Grounded
V
IN
=
0.5V
V
OUT
=
2.7V
V
OUT
=
0.5V
V
OUT
=
0V
V
O
=
HIGH Z
3
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74F821
AC Electrical Characteristics
T
A
= +25°C
Symbol
Parameter
Min
f
MAX
t
PLH
t
PHL
t
PZH
t
PZL
t
PHZ
t
PLZ
Maximum Clock Frequency
Propagation Delay
CP to O
n
Output Enable Time
OE to O
n
Output Disable Time
OE to O
n
100
2.0
2.0
2.0
2.0
1.5
1.5
V
CC
= +5.0V
C
L
=
50 pF
Typ
150
6.4
6.2
5.8
6.3
3.4
3.5
9.5
9.5
10.5
10.5
7.0
7.0
Max
T
A
= −55°C
to
+125°C
V
CC
= +5.0V
C
L
=
50 pF
Min
60
2.0
2.0
2.0
2.0
1.0
1.0
10.5
10.5
13.0
13.0
7.5
7.5
Max
T
A
=
0°C to
+70°C
V
CC
= +5.0V
C
L
=
50 pF
Min
70
2.0
2.0
2.0
2.0
1.5
1.5
10.5
10.5
11.5
11.5
7.5
7.5
ns
Max
MHz
ns
Units
AC Operating Requirements
T
A
= +25°C
Symbol
Parameter
V
CC
= +5.0V
Min
t
S
(H)
t
S
(L)
t
H
(H)
t
H
(L)
t
W
(H)
t
W
(L)
Setup Time, HIGH or LOW
D
n
to CP
Hold Time, HIGH or LOW
D
n
to CP
CP Pulse Width
HIGH or LOW
2.5
2.5
2.5
2.5
5.0
5.0
Max
T
A
= −55°C
to
+125°C
V
CC
= +5.0V
Min
4.0
4.0
2.5
2.5
6.0
6.0
Max
T
A
=
0°C to
+70°C
V
CC
= +5.0V
Min
3.0
3.0
2.5
2.5
6.0
6.0
ns
ns
Max
Units
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4
74F821
Physical Dimensions
inches (millimeters) unless otherwise noted
24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
Package Number M24B
5
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