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SCAS497 − D3442, MARCH 1990 − REVISED APRIL 1993
74AC11273
OCTAL D TYPE FLIP FLOP
WITH CLEAR
•
•
•
•
•
•
Applications Include:
Buffer/Storage Registers
Shift Registers
Pattern Generators
Flow-Through Architecture to Optimize
PCB Layout
Multiple Center-Pin V
CC
and GND
Configurations to Minimize High-Speed
Switching Noise
EPICt
(Enhanced-Performance Implanted
CMOS) 1-mm Process
500-mA Typical Latch-Up Immunity
at 125°C
Package Options Include Plastic
Small-Outline Packages and Standard
Plastic 300-mil DIPs
DW OR NT PACKAGE
(TOP VIEW)
1Q
2Q
3Q
4Q
GND
GND
GND
GND
5Q
6Q
7Q
8Q
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
CLR
1D
2D
3D
4D
V
CC
V
CC
5D
6D
7D
8D
CLK
description
These positive-edge-triggered flip-flops implement D-type flip-flop logic with a direct clear input.
Data at the D inputs meeting the setup time requirements is transferred to the Q outputs on the positive-going
edge of the clock pulse. When the clock input is at either the high or low level, the D input signal has no effect
at the output.
The 74AC11273 is characterized for operation from − 40°C to 85°C.
FUNCTION TABLE
INPUTS
CLR
L
H
H
H
CLK
X
↑
↑
L
D
X
H
L
X
OUTPUT
Q
L
H
L
Q0
1D
2D
3D
4D
5D
6D
7D
8D
logic symbol
†
CLR
CLK
24
13
23
22
21
20
17
16
15
14
G1
C1
1D
1
2
3
4
9
10
11
12
1Q
2Q
3Q
4Q
5Q
6Q
7Q
8Q
† This symbol is in accordance with ANSI/IEEE Std 91-1984
and IEC Publication 617-12.
EPIC is a trademark of Texas Instruments Incorporated.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright
1993, Texas Instruments Incorporated
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
POST OFFICE BOX 1443 HOUSTON, TEXAS 77001
•
•
2−1
SCAS497 − D3442, MARCH 1990 − REVISED APRIL 1993
74AC11273
OCTAL D TYPE FLIP FLOP
WITH CLEAR
logic diagram (positive logic)
1D
23
13
2D
22
3D
21
4D
20
5D
17
6D
16
7D
15
8D
14
CLK
1D
C1
R
24
CLR
1D
C1
R
1D
C1
R
1D
C1
R
1D
C1
R
1D
C1
R
1D
C1
R
1D
C1
R
1
1Q
2
2Q
3
3Q
4
4Q
9
5Q
10
6Q
11
7Q
12
8Q
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
†
Supply voltage range, V
CC
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . − 0.5 V to 7 V
Input voltage range, V
I
(see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . − 0.5 V to V
CC
+ 0.5 V
Output voltage range, V
O
(see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . − 0.5 V to V
CC
+ 0.5 V
Input clamp current, I
IK
(V
I
< 0 or V
I
> V
CC
) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
±
20 mA
Output clamp current, I
OK
(V
O
< 0 or V
O
> V
CC
) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
±
50 mA
Continuous output current, I
O
(V
O
= 0 to V
CC
) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
±
50 mA
Continuous current through V
CC
or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
±
200 mA
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . − 65°C to 150°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
recommended operating conditions
MIN
VCC
VIH
Supply voltage
VCC = 3 V
VCC = 4.5 V
VCC = 5.5 V
VCC = 3 V
VIL
VI
VO
IOH
Low-level input voltage
Input voltage
Output voltage
VCC = 3 V
VCC = 4.5 V
VCC = 5.5 V
VCC = 3 V
IOL
Dt
/Dv
TA
Low-level output current
Input transition rise or fall rate
Operating free-air temperature
VCC = 4.5 V
VCC = 5.5 V
0
− 40
VCC = 4.5 V
VCC = 5.5 V
0
0
3
2.1
3.15
3.85
0.9
1.35
1.65
VCC
VCC
−4
− 24
−24
12
24
24
10
85
ns / V
°C
mA
mA
V
V
V
V
NOM
5
MAX
5.5
UNIT
V
High-level input voltage
High-level output current
2−2
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
POST OFFICE BOX 1443 HOUSTON, TEXAS 77001
•
•
SCAS497 − D3442, MARCH 1990 − REVISED APRIL 1993
74AC11273
OCTAL D TYPE FLIP FLOP
WITH CLEAR
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
TEST CONDITIONS
VCC
3V
IOH = − 50
mA
IOH = − 4 mA
VOH
IOH = − 24 mA
IOH = − 50 mA
{
IOH = − 75 mA
{
IOL = 50
mA
IOL = 12 mA
VOL
IOL = 24 mA
IOL = 50 mA
{
IOL = 75 mA
{
II
ICC
Ci
VI = VCC or GND
VI = VCC or GND,
IO = 0
4.5 V
5.5 V
3V
4.5 V
5.5 V
5.5 V
5.5 V
3V
4.5 V
5.5 V
3V
4.5 V
5.5 V
5.5 V
5.5 V
5.5 V
5.5 V
±
0.1
8
1.65
±
1
80
mA
mA
pF
0.1
0.1
0.1
0.36
0.36
0.36
3.85
0.1
0.1
0.1
0.44
0.44
0.44
V
TA = 25°C
MIN
TYP
MAX
2.9
4.4
5.4
2.58
3.94
4.94
MIN
2.9
4.4
5.4
2.48
3.8
4.8
V
MAX
UNIT
VI = VCC or GND
5V
4
† Not more than one output should be tested at a time, and the duration of the test should not exceed 10 ms.
timing requirements over recommended operating free-air temperature range, V
CC
= 3.3 V
±
0.3 V
(unless otherwise noted) (see Figure 1)
TA = 25°C
MIN
MAX
fclock
tw
tsu
th
Clock frequency
CLR low
Pulse duration
Setup time before CLK↑
Hold time, data after CLK↑
CLK high or low
Data
CLR inactive
0
6
9.1
7.5
6
0
55
MIN
0
6
9.1
7.5
6
0
ns
ns
ns
MAX
55
UNIT
MHz
timing requirements over recommended operating free-air temperature range, V
CC
= 5 V
±
0.5 V
(unless otherwise noted) (see Figure 1)
TA = 25°C
MIN
MAX
fclock
tw
tsu
th
Clock frequency
CLR low
Pulse duration
Setup time before CLK↑
Hold time, data after CLK↑
CLK high or low
Data
CLR inactive
0
5
6.3
5
4.5
0
80
MIN
0
5
6.3
5
4.5
0
ns
ns
ns
MAX
80
UNIT
MHz
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
POST OFFICE BOX 1443 HOUSTON, TEXAS 77001
•
•
2−3
SCAS497 − D3442, MARCH 1990 − REVISED APRIL 1993
74AC11273
OCTAL D TYPE FLIP FLOP
WITH CLEAR
switching characteristics over recommended operating free-air temperature range,
V
CC
= 3.3 V
±
0.3 V (unless otherwise noted) (see Figure 1)
PARAMETER
fmax
tPHL
tPLH
tPHL
FROM
(INPUT)
TO
(OUTPUT)
TA = 25°C
MIN
TYP
MAX
55
CLR
CLK
Any Q
Any Q
5.2
4.2
5.5
14.3
12.1
14.5
16.5
14.3
16.7
MIN
55
5.2
4.2
5.5
18.4
16.5
18.6
ns
MAX
UNIT
MHz
ns
switching characteristics over recommended operating free-air temperature range,
V
CC
= 5 V
±
0.5 V (unless otherwise noted) (see Figure 1)
PARAMETER
fmax
tPHL
tPLH
tPHL
FROM
(INPUT)
TO
(OUTPUT)
TA = 25°C
MIN
TYP
MAX
80
CLR
CLK
Any Q
Any Q
4.3
3.5
4.5
9.2
7.7
9.3
10.9
9.3
11
MIN
80
4.3
3.5
4.5
12.3
10.7
12.4
ns
MAX
UNIT
MHz
ns
operating characteristics, V
CC
= 5 V, T
A
= 25°C
PARAMETER
Cpd
Power dissipation capacitance
TEST CONDITIONS
CL = 50 pF,
f = 1 MHz
TYP
80
UNIT
pF
2−4
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
POST OFFICE BOX 1443 HOUSTON, TEXAS 77001
•
•
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