74LVC2G66-Q100
Bilateral switch
Rev. 1 — 16 April 2013
Product data sheet
1. General description
The 74LVC2G66-Q100 is a low-power, low-voltage, high-speed Si-gate CMOS device.
The 74LVC2G66-Q100 provides two single pole, single-throw analog switch functions.
Each switch has two input/output terminals (nY and nZ) and an active HIGH enable input
(nE). When nE is LOW, the analog switch is turned off.
Schmitt trigger action at the enable inputs makes the circuit tolerant of slower input rise
and fall times across the entire V
CC
range from 1.65 V to 5.5 V.
This product has been qualified to the Automotive Electronics Council (AEC) standard
Q100 (Grade 1) and is suitable for use in automotive applications.
2. Features and benefits
Automotive product qualification in accordance with AEC-Q100 (Grade 1)
Specified from
40 C
to +85
C
and from
40 C
to +125
C
Wide supply voltage range from 1.65 V to 5.5 V
Very low ON resistance:
7.5
(typical) at V
CC
= 2.7 V
6.5
(typical) at V
CC
= 3.3 V
6
(typical) at V
CC
= 5 V
Switch current capability of 32 mA
High noise immunity
CMOS low power consumption
TTL interface compatibility at 3.3 V
Latch-up performance meets requirements of JESD78 Class I
ESD protection:
MIL-STD-883, method 3015 exceeds 2000 V
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0
)
Enable input accepts voltages up to 5.5 V
Multiple package options
NXP Semiconductors
74LVC2G66-Q100
Bilateral switch
3. Ordering information
Table 1.
Ordering information
Package
Temperature range Name
74LVC2G66DP-Q100
74LVC2G66DC-Q100
40 C
to +125
C
40 C
to +125
C
TSSOP8
Description
plastic thin shrink small outline package; 8 leads;
body width 3 mm; lead length 0.5 mm
Version
SOT505-2
SOT765-1
Type number
VSSOP8 plastic very thin shrink small outline package; 8
leads; body width 2.3 mm
4. Marking
Table 2.
Marking codes
Marking code
[1]
V66
V66
Type number
74LVC2G66DP-Q100
74LVC2G66DC-Q100
[1]
The pin 1 indicator is located on the lower left corner of the device, below the marking code.
5. Functional diagram
1
#
1
X1
1
#
001aah807
1
X1
001aah808
Fig 1.
Logic symbol
Fig 2.
IEC logic symbol
nZ
nY
nE
V
CC
mna658
Fig 3.
Logic diagram (one switch)
74LVC2G66_Q100
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 1 — 16 April 2013
2 of 23
NXP Semiconductors
74LVC2G66-Q100
Bilateral switch
6. Pinning information
6.1 Pinning
/9&*4
<
=
(
*1'
DDD
9
&&
(
=
<
Fig 4.
Pin configuration SOT505-2 and SOT765-1
6.2 Pin description
Table 3.
Symbol
1Y
1Z
2E
GND
2Y
2Z
1E
V
CC
Pin description
Pin
1
2
3
4
5
6
7
8
Symbol
independent input or output
independent input or output
enable input (active HIGH)
ground (0 V)
independent input or output
independent input or output
enable input (active HIGH)
supply voltage
7. Functional description
Table 4.
Input nE
L
H
[1]
H = HIGH voltage level; L = LOW voltage level.
Function table
[1]
Switch
OFF-state
ON-state
74LVC2G66_Q100
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 1 — 16 April 2013
3 of 23
NXP Semiconductors
74LVC2G66-Q100
Bilateral switch
8. Limiting values
Table 5.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
V
CC
V
I
I
IK
I
SK
V
SW
I
SW
I
CC
I
GND
T
stg
P
tot
[1]
[2]
[3]
Parameter
supply voltage
input voltage
input clamping current
switch clamping current
switch voltage
switch current
supply current
ground current
storage temperature
total power dissipation
Conditions
[1]
Min
0.5
0.5
50
-
[2]
Max
+6.5
+6.5
-
50
V
CC
+ 0.5
50
100
-
+150
250
Unit
V
V
mA
mA
V
mA
mA
mA
C
mW
V
I
<
0.5
V or V
I
> V
CC
+ 0.5 V
V
I
<
0.5
V or V
I
> V
CC
+ 0.5 V
enable and disable mode
V
SW
>
0.5
V or
V
SW
< V
CC
+ 0.5 V
0.5
-
-
100
65
T
amb
=
40 C
to +125
C
[3]
-
The minimum input voltage rating may be exceeded if the input current rating is observed.
The minimum and maximum switch voltage ratings may be exceeded if the switch clamping current rating is observed.
For TSSOP8 package: above 55
C
the value of P
tot
derates linearly with 2.5 mW/K.
For VSSOP8 package: above 110
C
the value of P
tot
derates linearly with 8 mW/K.
9. Recommended operating conditions
Table 6.
Symbol
V
CC
V
I
V
SW
T
amb
t/V
Operating conditions
Parameter
supply voltage
input voltage
switch voltage
ambient temperature
input transition rise and fall rate
V
CC
= 1.65 V to 2.7 V
V
CC
= 2.7 V to 5.5 V
[1]
[2]
[2]
[1]
Conditions
Min
1.65
0
0
40
-
-
Max
5.5
5.5
V
CC
+125
20
10
Unit
V
V
V
C
ns/V
ns/V
To avoid sinking GND current from terminal nZ when switch current flows in terminal nY, the voltage drop across the bidirectional switch
must not exceed 0.4 V. If the switch current flows into terminal nZ, no GND current flows from terminal nY. In this case, there is no limit
for the voltage drop across the switch.
Applies to control signal levels.
[2]
74LVC2G66_Q100
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 1 — 16 April 2013
4 of 23
NXP Semiconductors
74LVC2G66-Q100
Bilateral switch
10. Static characteristics
Table 7.
Static characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter
V
IH
HIGH-level
input voltage
Conditions
V
CC
= 1.65 V to 1.95 V
V
CC
= 2.3 V to 2.7 V
V
CC
= 2.7 V to 3.6 V
V
CC
= 4.5 V to 5.5 V
V
IL
LOW-level
input voltage
V
CC
= 1.65 V to 1.95 V
V
CC
= 2.3 V to 2.7 V
V
CC
= 2.7 V to 3.6 V
V
CC
= 4.5 V to 5.5 V
I
I
I
S(OFF)
input leakage
current
OFF-state
leakage
current
ON-state
leakage
current
supply current
pin nE; V
I
= 5.5 V or GND;
V
CC
= 0 V to 5.5 V
V
CC
= 5.5 V; see
Figure 5
[2]
40 C
to +85
C
Min
0.65
V
CC
1.7
2.0
0.7
V
CC
-
-
-
-
-
-
Typ
[1]
-
-
-
-
-
-
-
-
0.1
0.1
Max
-
-
-
-
0.35
V
CC
0.7
0.8
0.3
V
CC
5
5
40 C
to +125
C
Min
0.65
V
CC
1.7
2.0
0.7
V
CC
-
-
-
-
-
-
Max
-
-
-
-
0.7
0.8
0.3
V
CC
100
200
Unit
V
V
V
V
V
V
V
A
A
0.35
V
CC
V
[2]
I
S(ON)
V
CC
= 5.5 V; see
Figure 6
[2]
-
0.1
5
-
200
A
I
CC
V
I
= 5.5 V or GND;
V
SW
= GND or V
CC
;
V
CC
= 1.65 V to 5.5 V
pin nE; V
I
= V
CC
0.6 V;
V
SW
= GND or V
CC
;
V
CC
= 5.5 V
[2]
-
0.1
10
-
200
A
I
CC
additional
supply current
input
capacitance
OFF-state
capacitance
ON-state
capacitance
[2]
-
5
500
-
5000
A
C
I
C
S(OFF)
C
S(ON)
-
-
-
2.0
5.0
9.5
-
-
-
-
-
-
-
-
-
pF
pF
pF
[1]
[2]
All typical values are measured at T
amb
= 25
C.
These typical values are measured at V
CC
= 3.3 V.
74LVC2G66_Q100
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 1 — 16 April 2013
5 of 23
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
