74F675A 16-Bit Serial-In, Serial/Parallel-Out Shift Register
April 1988
Revised October 2000
74F675A
16-Bit Serial-In, Serial/Parallel-Out Shift Register
General Description
The 74F675A contains a 16-bit serial in/serial out shift reg-
ister and a 16-bit parallel out storage register. Separate
serial input and output pins are provided for expansion to
longer words. By means of a separate clock, the contents
of the shift register are transferred to the storage register.
The contents of the storage register can also be loaded
back into the shift register. A HIGH signal on the Chip
Select input prevents both shifting and parallel loading.
Features
s
Serial-to-parallel converter
s
16-Bit serial I/O shift register
s
16-Bit parallel out storage register
s
Recirculating parallel transfer
s
Expandable for longer words
s
Slim 24 lead package
s
74F675A version prevents false clocking through
CS or R/W inputs
Ordering Code:
Order Number
74F675ASC
74F675APC
74F675ASPC
Package Number
M24B
N24A
N24C
Package Description
24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-011, 0.600 Wide
24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbols
IEEE/IEC
Connection Diagram
© 2000 Fairchild Semiconductor Corporation
DS009587
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74F675A
Unit Loading/Fan Out
Pin Names
SI
CS
SHCP
STCP
R/W
SO
Q
0
–Q
15
Serial Data Input
Chip Select Input (Active LOW)
Shift Clock Pulse Input (Active Falling Edge)
Store Clock Pulse Input (Active Rising Edge)
Read/Write Input
Serial Data Output
Parallel Data Outputs
Description
U.L.
HIGH/LOW
1.0/1.0
1.0/1.0
1.0/1.0
1.0/1.0
1.0/1.0
50/33.3
50/33.3
Input I
IH
/I
IL
Output I
OH
/I
OL
20
µ
A/
−
0.6 mA
20
µ
A/
−
0.6 mA
20
µ
A/
−
0.6 mA
20
µ
A/
−
0.6 mA
20
µ
A/
−
0.6 mA
−
1 mA/20 mA
−
1 mA/20 mA
Functional Description
The 16-Bit shift register operates in one of four modes, as
determined by the signals applied to the Chip Select (CS),
Read/Write (R/W) and Store Clock Pulse (STCP) input.
State changes are indicated by the falling edge of the Shift
Clock Pulse (SHCP). In the Shift Right mode, data enters
D
0
from the Serial Input (SI) pin and exits from Q
15
via the
Serial Data Output (SO) pin. In the Parallel Load mode,
data from the storage register outputs enter the shift regis-
ter and serial shifting is inhibited.
The storage register is in the Hold mode when either CS or
R/W is HIGH. With CS and R/W both LOW, the storage
register is parallel loaded from the shift register on the ris-
ing edge of STCP.
To prevent false clocking of the shift register, SHCP should
be in the LOW state during a LOW-to-HIGH transition of
CS. To prevent false clocking of the storage register, STCP
should be LOW during a HIGH-to-LOW transition of CS if
R/W is LOW, and should also be LOW during a
HIGH-to-LOW transition of R/W if CS is LOW.
Shift Register Operations Table
Control Inputs
CS
H
L
L
L
R/W
X
L
H
H
SHCP STCP
Operating
Mode
Hold
Shift Right
Shift Right
Parallel Load,
No Shifting
Storage Register Operations Table
Inputs
CS
H
L
L
R/W
X
H
L
STCP
X
Operating
Mode
Hold
Hold
Parallel Load
X
X
X
L
H
H
=
HIGH Voltage Level
L
=
LOW Voltage Level
X
=
Immaterial
=
HIGH-to-LOW Transition
=
LOW-to-HIGH Transition
X
Logic Diagram
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
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2
74F675A
Absolute Maximum Ratings
(Note 1)
Storage Temperature
Ambient Temperature under Bias
Junction Temperature under Bias
V
CC
Pin Potential to Ground Pin
Input Voltage (Note 2)
Input Current (Note 2)
Voltage Applied to Output
in HIGH State (with V
CC
=
0V)
Standard Output
3-STATE Output
Current Applied to Output
in LOW State (Max)
twice the rated I
OL
(mA)
−
65
°
C to
+
150
°
C
−
55
°
C to
+
125
°
C
−
55
°
C to
+
150
°
C
−
0.5V to
+
7.0V
−
0.5V to
+
7.0V
−
30 mA to
+
5.0 mA
Recommended Operating
Conditions
Free Air Ambient Temperature
Supply Voltage
0
°
C to
+
70
°
C
+
4.5V to
+
5.5V
−
0.5V to V
CC
−
0.5V to
+
5.5V
Note 1:
Absolute maximum ratings are values beyond which the device
may be damaged or have its useful life impaired. Functional operation
under these conditions is not implied.
Note 2:
Either voltage limit or current limit is sufficient to protect inputs.
DC Electrical Characteristics
Symbol
V
IH
V
IL
V
CD
V
OH
V
OL
I
IH
I
BVI
I
CEX
V
ID
I
OD
I
IL
I
OS
I
CCH
I
CCL
Parameter
Input HIGH Voltage
Input LOW Voltage
Input Clamp Diode Voltage
Output HIGH
Voltage
Output LOW
Voltage
Input HIGH
Current
Input HIGH Current
Breakdown Test
Output HIGH
Leakage Current
Input Leakage
Test
Output Leakage
Circuit Current
Input LOW Current
Output Short-Circuit Current
Power Supply Current
Power Supply Current
−60
106
106
4.75
3.75
−0.6
−150
160
160
10% V
CC
5% V
CC
10% V
CC
2.5
2.7
0.5
5.0
7.0
50
Min
2.0
0.8
−1.2
Typ
Max
Units
V
V
V
V
V
µA
µA
µA
V
µA
mA
mA
mA
mA
Min
Min
Min
Max
Max
Max
0.0
0.0
Max
Max
Max
Max
V
CC
Conditions
Recognized as a HIGH Signal
Recognized as a LOW Signal
I
IN
= −18
mA
I
OH
= −1
mA
I
OH
= −1
mA
I
OL
=
20 mA
V
IN
=
2.7V
V
IN
=
7.0V
V
OUT
=
V
CC
I
ID
=
1.9
µA
All Other Pins Grounded
V
IOD
=
150 mV
All Other Pins Grounded
V
IN
=
0.5V
V
OUT
=
0V
V
O
=
HIGH
V
O
=
LOW
3
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74F675A
AC Electrical Characteristics
T
A
= +25°C
Symbol
Parameter
Min
f
MAX
t
PLH
t
PHL
t
PLH
t
PHL
Maximum Clock Frequency
Propagation Delay
STCP to Q
n
Propagation Delay
SHCP to SO
100
3.0
3.0
4.0
4.5
V
CC
= +5.0V
C
L
=
50 pF
Typ
130
8.0
10.5
7.0
8.0
10.5
13.5
9.5
10.5
Max
T
A
=
0°C to
+70°C
V
CC
= +5.0V
C
L
=
50 pF
Min
85
2.5
2.5
3.5
4.0
12.0
15.0
10.5
12.0
Max
MHz
ns
ns
Units
AC Operating Requirements
T
A
= +25°C
Symbol
Parameter
V
CC
= +5.0V
Min
t
S
(H)
t
S
(L)
t
H
(H)
t
H
(L)
t
S
(H)
t
S
(L)
t
H
(H)
t
H
(L)
t
S
(H)
t
S
(L)
t
H
(H)
t
H
(L)
t
S
(H)
t
S
(L)
t
H
(H)
t
H
(L)
t
S
(H)
t
S
(L)
t
H
(H)
t
H
(L)
t
W
(H)
t
W
(L)
t
W
(H)
t
W
(L)
t
S
(L)
t
H
(H)
Setup Time, HIGH or LOW
CS or R/W to STCP
Hold Time, HIGH or LOW
CS or R/W to STCP
Setup Time, HIGH or LOW
SI to SHCP
Hold Time, HIGH or LOW
SI to SHCP
Setup Time, HIGH or LOW
R/W to SHCP
Hold Time, HIGH or LOW
R/W to SHCP
Setup Time, HIGH or LOW
STCP to SHCP
Hold Time, HIGH or LOW
STCP to SHCP
Setup Time, HIGH or LOW
CS to SHCP
Hold Time, HIGH or LOW
CS to SHCP
SHCP Pulse Width
HIGH or LOW
STCP Pulse Width
HIGH or LOW
SHCP to STCP
SHCP to STCP
3.5
5.5
0
0
3.0
3.0
3.0
3.0
6.5
9.0
0
0
7.0
7.0
0
0
3.0
3.0
3.0
3.0
5.0
5.0
6.0
5.0
8.0
0.0
Max
T
A
=
0°C to
+70°C
V
CC
= +5.0V
Min
4.0
6.5
0
0
3.5
3.5
3.5
3.5
7.5
10.0
0
0
8.0
8.0
0
0
3.5
3.5
3.5
3.5
6.0
6.0
7.0
6.0
9.0
0.0
ns
ns
ns
ns
ns
ns
ns
ns
Max
Units
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4
74F675A
Physical Dimensions
inches (millimeters) unless otherwise noted
24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
Package Number M24B
24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-011, 0.600 Wide
Package Number N24A
5
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