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74AC574B

产品描述AC SERIES, 8-BIT DRIVER, TRUE OUTPUT, PDIP20, PLASTIC, DIP-20
产品类别逻辑    逻辑   
文件大小79KB,共11页
制造商ST(意法半导体)
官网地址http://www.st.com/
标准
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74AC574B概述

AC SERIES, 8-BIT DRIVER, TRUE OUTPUT, PDIP20, PLASTIC, DIP-20

74AC574B规格参数

参数名称属性值
是否Rohs认证符合
厂商名称ST(意法半导体)
零件包装代码DIP
包装说明DIP, DIP20,.3
针数20
Reach Compliance Codecompliant
其他特性BROADSIDE VERSION OF 374
系列AC
JESD-30 代码R-PDIP-T20
JESD-609代码e3
负载电容(CL)50 pF
逻辑集成电路类型BUS DRIVER
最大频率@ Nom-Sup60000000 Hz
最大I(ol)0.012 A
位数8
功能数量1
端口数量2
端子数量20
最高工作温度125 °C
最低工作温度-55 °C
输出特性3-STATE
输出极性TRUE
封装主体材料PLASTIC/EPOXY
封装代码DIP
封装等效代码DIP20,.3
封装形状RECTANGULAR
封装形式IN-LINE
峰值回流温度(摄氏度)NOT SPECIFIED
电源3.3/5 V
传播延迟(tpd)16.5 ns
认证状态Not Qualified
座面最大高度3.93 mm
最大供电电压 (Vsup)6 V
最小供电电压 (Vsup)2 V
标称供电电压 (Vsup)3.3 V
表面贴装NO
技术CMOS
温度等级MILITARY
端子面层Matte Tin (Sn)
端子形式THROUGH-HOLE
端子节距2.54 mm
端子位置DUAL
处于峰值回流温度下的最长时间NOT SPECIFIED
触发器类型POSITIVE EDGE
宽度7.62 mm
Base Number Matches1

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74AC574
OCTAL D-TYPE FLIP-FLOP
WITH 3 STATE OUTPUTS (NON INVERTED)
s
s
s
s
s
s
s
s
s
HIGH SPEED:
f
MAX
= 250MHz (TYP.) at V
CC
= 5V
LOW POWER DISSIPATION:
I
CC
= 4µA(MAX.) at T
A
=25°C
HIGH NOISE IMMUNITY:
V
NIH
= V
NIL
= 28 % V
CC
(MIN.)
50Ω TRANSMISSION LINE DRIVING
CAPABILITY
SYMMETRICAL OUTPUT IMPEDANCE:
|I
OH
| = I
OL
= 24mA (MIN)
BALANCED PROPAGATION DELAYS:
t
PLH
t
PHL
OPERATING VOLTAGE RANGE:
V
CC
(OPR) = 2V to 6V
PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 574
IMPROVED LATCH-UP IMMUNITY
DIP
SOP
TSSOP
ORDER CODES
PACKAGE
DIP
SOP
TSSOP
TUBE
74AC574B
74AC574M
T&R
74AC574MTR
74AC574TTR
DESCRIPTION
The 74AC574 is an advanced high-speed CMOS
OCTAL D-TYPE FLIP-FLOP with 3 STATE
OUTPUTS NON INVERTING fabricated with
sub-micron silicon gate and double-layer metal
wiring C
2
MOS technology.
These 8 bit D-Type Flip-Flop are controlled by a
clock input (CK) and an output enable input (OE).
On the positive transition of the clock, the Q
outputs will be set to the logic that were setup at
the D inputs.
PIN CONNECTION AND IEC LOGIC SYMBOLS
While the (OE) input is low, the 8 outputs will be in
a normal logic state (high or low logic level); while
OE is in high level, the outputs will be in a high
impedance state.
The output control does not affect the internal
operation of flip-flops; that is, the old data can be
retained or the new data can be entered even
while the outputs are off.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
April 2001
1/11

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