74GTL1655
16 BIT LVTTL TO GTL/GTL + UNIVERSAL BUS
TRANSCEIVERS WITH LIVE INSERTION
s
s
s
s
s
s
s
s
s
s
s
HIGH SPEED GTL/GTL+ UNIVERSAL
TRANSCEIVER :
t
PD
= 4.6 ns (MAX.) A to B at V
CC
= 3V
COMBINES D-TYPE LATCHES AND D-TYPE
FLIP-FLOPS FOR OPERATION IN
TRANSPARENT, LATCHED, OR CLOCKED
MODE
OPERATING VOLTAGE RANGE:
V
CC
(OPR) = 3.0V to 3.6V
SYMMETRICAL OUTPUT IMPEDANCE:
|I
OH
| = I
OL
=24mA (MIN) at V
CC
= 3V (A PORT)
OUTPUT IMPEDANCE:
I
OL
= 100mA (MIN) at V
CC
= 3V (B PORT)
HIGH-IMPEDANCE STATE DURING POWER
UP AND POWER DOWN up to Vcc=1.5V
PERMITT LIVE INSERTION
B-PORT PRECHARGED BY BIASVcc
REDUCE NOISE ON THE LINE DURING
LIVE INSERTION
EDGE RATE-CONTROL INPUT
CONFIGURES THE B-PORT OUTPUT RISE
AND FALL TIMES
BUS HOLD ON DATA INPUTS ELIMINATES
THE NEED FOR EXTERNAL PULL-UP/
PULL-DOWN RESISTORS (A PORT)
DISTRIBUTED VCC AND GND PIN
CONFIGURATION MINIMIZES HIGH-SPEED
SWITCHING NOISE IN PARALLEL
COMUNICATIONS .
PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 1655
TSSOP
ORDER CODES
PACKAGE
TSSOP
TUBE
T&R
74GTL1655TTR
PIN CONNECTION
DESCRIPTION
The 74GTL1655 devices are 16-bit high-drive
(100mA), low-output-impedance universal bus
transceivers designed for backplane applications.
The 74GTL1655 devices provide live-insertion
capability for backplane applications by tolerating
active signals on the data ports when the devices
are powered off. In addition, a biasing pin
preconditions the GTL/GTL+ port to minimize
disruption to an active backplane.
The edge rate-control (V
ERC
) input is provided so
the rise and fall time of the B outputs can be
configured to optimize for various backplane
loading conditions. Data flow in each direction is
controlled by output-enable (OEAB and OEBA),
December 2001
1/14
74GTL1655
latch-enable (LEAB and LEBA), and clock (CLK)
inputs. For A-to-B data flow, the devices operate
in the transparent mode when LEAB is high. When
LEAB is low, the A data is latched if CLK is held at
a high or low logic level. If LEAB is low, the A data
is stored in the latch/flip-flop on the low-to-high
transition of CLK. When OEAB is low, the outputs
are active. When OEAB is high, the outputs are in
the high-impedance state. Data flow for B to A is
similar to that of A to B, but uses OEBA, LEBA,
and CLK. The output enable (OE) is used to
disable both ports simultaneously.
INPUT AND OUTPUT EQUIVALENT CIRCUIT
Active bus-hold circuitry is provided on the A port
to hold unused or floating data inputs at a valid
logic level. When V
CC
is between 0 and 1.5 V, the
device is in the high-impedance state during
power up or power down. However, to ensure the
high-impedance state above 1.5V , OE should be
tied to V
CC
through a pullup resistor; the minimum
value of the resistor is determined by the
current-sinking capability of the driver.
All input and output are equipped with protection
circuits against static discharge, giving them 2KV
ESD immunity and transient excess voltage.
PIN DESCRIPTION
PIN N°
1, 2
4, 6, 7, 9, 11, 13, 14, 16
17, 19, 20, 22, 23, 25, 27, 29
31, 32
33
34, 35
36
37, 38, 40, 42, 43, 45, 46, 48
41
49, 51, 52, 54, 55, 56, 58, 59
61
62, 63
64
5, 8, 10, 12, 18, 21, 24, 26, 30,
39, 44, 47, 53, 57, 60
3, 15, 28, 50
2/14
SYMBOL
1OEAB, 1OEBA
1A1 to 1A8
2A1 to 2A8
2OEAB, 2OEBA
OE
2LEBA, 2LEAB
BIAS V
CC
2B8 to 2B1
V
REF
2A1 to 2A8
V
ERC
1LEBA, 1LEAB
CLK
GND
V
CC
NAME AND FUNCTION
Output Enable Input
Data Inputs/Outputs LVTTL
Data Inputs/Outputs LVTTL
Output Enable Input
Output Enable Input
Latch Enable
Pre-Charge Supply Voltage
Data Inputs/Outputs GTL/GTL+
GTL Voltage Reference Input
Data Inputs/Outputs GTL/GTL+
Edge Rate Control
Latch Enable
Clock Input (LOW to HIGH edge triggered)
Ground (0V)
Positive Supply Voltage
74GTL1655
ABSOLUTE MAXIMUM RATINGS
Symbol
V
CC
V
IA
V
IB
V
OA
V
OB
I
IK
I
OK
I
OA
I
OB
T
stg
T
L
Parameter
Supply Voltage, Bias V
CC
DC Input Voltage A Side, Control Input
DC Input Voltage B Side, V
ERC
, V
REF
DC Output Voltage A Side
DC Output Voltage B Side
DC Input Diode Current
DC Output Diode Current
DC Output Current A Side
DC Output Current B Side in the Low State
Storage Temperature
Lead Temperature (10 sec)
Value
-0.5 to +4.6
-0.5 to +4.6
-0.5 to +4.6
-0.5 to +4.6
-0.5 to +4.6
- 50
- 50
±
48
200
-65 to +150
300
Unit
V
V
V
V
V
mA
mA
mA
mA
°C
°C
Absolute Maximum Rating are those value beyond which damage to the device may occur. Functional operation under these condition is not
implied
RECOMMENDED OPERATING CONDITIONS
Value
Symbol
V
CC
V
TT
V
REF
V
I
V
IH
V
IL
I
IK
I
OH
I
OL
dt/dV
CC
T
op
Supply Voltage
Termination Voltage
Supply Voltage
Input Voltage
High Level Input Voltage
Low Level Input Voltage
Input Clamp Current
High Level Output Current
Low Level Output Current
Power -up ramp rate
Operating Temperature
A port
A port
B port
200
-40
85
GTL
GTL+
GTL
GTL+
B port
other
B port
other
B port
other
Parameter
Min.
3.0
1.14
1.35
0.74
0.87
0
0
V
REF
+0.05
2
V
REF
-0.05
0.8
-18
-24
24
100
Typ.
3.3
1.2
1.5
0.8
1
Max.
3.6
1.26
1.65
0.87
1.1
V
TT
V
CC
V
V
V
V
V
V
mA
mA
mA
µs/V
°C
Unit
1) V
TT
and R
TT
can be adjusted to adapt backplane impedance if DC raccomanded I
OL
ratings are not exceeded
2) V
REF
can be adjusted to optimaze noise margin (typ two-thirds V
TT
)
5/14
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