CY74FCT2374T
8-BIT REGISTER
WITH 3-STATE OUTPUTS
SCCS040A – SEPTEMBER 1994 – REVISED OCTOBER 2001
D
D
D
D
D
D
D
D
D
D
D
D
Function and Pinout Compatible With FCT
and F Logic
25-Ω Output Series Resistors to Reduce
Transmission-Line Reflection Noise
Reduced V
OH
(Typically = 3.3 V) Version of
Equivalent FCT Functions
Edge-Rate Control Circuitry for
Significantly Improved Noise
Characteristics
I
off
Supports Partial-Power-Down Mode
Operation
Matched Rise and Fall Times
Fully Compatible With TTL Input and
Output Logic Levels
ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)
3-State Outputs
12-mA Output Sink Current
15-mA Output Source Current
Edge-Triggered D-Type Inputs
250-MHz Typical Switching Rate
SN74FCT2374T . . . Q OR SO PACKAGE
(TOP VIEW)
OE
O
0
D
0
D
1
O
1
O
2
D
2
D
3
O
3
GND
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
V
CC
O
7
D
7
D
6
O
6
O
5
D
5
D
4
O
4
CP
description
The CY74FCT2374T is a high-speed, low-power, octal D-type flip-flop featuring separate D-type inputs for each
flip-flop. On-chip termination resistors at the outputs reduce system noise caused by reflections. The
CY74FCT2374T can replace the CY74FCT374T to reduce noise in an existing design. The device has 3-state
outputs for bus-oriented applications. A buffered clock (CP) and output-enable (OE) inputs are common to all
flip-flops. The flip-flops in the CY74FCT2374T store the state of their individual data (D) inputs that meet the
setup-time and hold-time requirements on the low-to-high CP transition. When OE is low, the contents of the
flip-flops are available at the outputs. When OE is high, the outputs are in the high-impedance state. The state
of OE does not affect the state of the flip-flops.
This device is fully specified for partial-power-down applications using I
off
. The I
off
circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright
2001, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303
•
DALLAS, TEXAS 75265
1
CY74FCT2374T
8-BIT REGISTER
WITH 3-STATE OUTPUTS
SCCS040A – SEPTEMBER 1994 – REVISED OCTOBER 2001
ORDERING INFORMATION
TA
PACKAGE†
QSOP – Q
SOIC – SO
–40°C to 85°C
40°C
QSOP – Q
SOIC – SO
SOIC – SO
Tape and reel
Tube
Tape and reel
Tape and reel
Tube
Tape and reel
Tube
Tape and reel
SPEED
(ns)
5.2
5.2
5.2
6.5
6.5
6.5
10
10
ORDERABLE
PART NUMBER
CY74FCT2374CTQCT
CY74FCT2374CTSOC
CY74FCT2374CTSOCT
CY74FCT2374ATQCT
CY74FCT2374ATSOC
CY74FCT2374ATSOCT
CY74FCT2374TSOC
CY74FCT2374TSOCT
TOP-SIDE
MARKING
FCT2374C
FCT2374C
FCT2374A
FCT2374A
FCT2374
† Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
FUNCTION TABLE
INPUTS
D
H
L
X
CP
↑
↑
X
OE
L
L
H
OUTPUT
O
H
L
Z
H = High logic level, L = Low logic level,
X = Don’t care, Z = High-impedance
state,
↑
= Low-to-high clock transition
logic diagram (positive logic)
OE
1
CP
11
CP
2
D0
3
D
Q
O0
To Seven Other Channels
2
POST OFFICE BOX 655303
•
DALLAS, TEXAS 75265
CY74FCT2374T
8-BIT REGISTER
WITH 3-STATE OUTPUTS
SCCS040A – SEPTEMBER 1994 – REVISED OCTOBER 2001
absolute maximum rating over operating free-air temperature range (unless otherwise noted)
†
Supply voltage range to ground potential . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V
DC input voltage range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V
DC output voltage range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V
DC output current (maximum sink current/pin) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120 mA
Package thermal impedance,
θ
JA
(see Note 1): Q package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68°C/W
SO package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58°C/W
Ambient temperature range with power applied, T
A
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 135°C
Storage temperature range, T
stg
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: The package thermal impedance is calculated in accordance with JESD 51-7.
recommended operating conditions (see Note 2)
MIN
VCC
VIH
VIL
IOH
IOL
TA
Supply voltage
High-level input voltage
Low-level input voltage
High-level output current
Low-level output current
Operating free-air temperature
–40
4.75
2
0.8
– 15
12
85
NOM
5
MAX
5.25
UNIT
V
V
V
mA
mA
°C
NOTE 2: All unused inputs of the device must be held at VCC or GND to ensure proper device operation.
POST OFFICE BOX 655303
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DALLAS, TEXAS 75265
3
CY74FCT2374T
8-BIT REGISTER
WITH 3-STATE OUTPUTS
SCCS040A – SEPTEMBER 1994 – REVISED OCTOBER 2001
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
VIK
VOH
VOL
ROUT
Vhys
II
IIH
IIL
IOZH
IOZL
IOS‡
Ioff
ICC
∆I
CC
ICCD¶
VCC = 4.75 V,
VCC = 4.75 V,
VCC = 4.75 V,
VCC = 4.75 V,
All inputs
VCC = 5.25 V,
VCC = 5.25 V,
VCC = 5.25 V,
VCC = 5.25 V,
VCC = 5.25 V,
VCC = 5.25 V,
VCC = 0 V,
VIN = VCC
VIN = 2.7 V
VIN = 0.5 V
VOUT = 2.7 V
VOUT = 0.5 V
VOUT = 0 V
VOUT = 4.5 V
0.1
0.5
0.06
0.7
1.2
1.6
3.9
5
9
–60
–120
TEST CONDITIONS
IIN = –18 mA
IOH = –15 mA
IOL = 12 mA
IOL = 12 mA
MIN
2.4
20
TYP†
–0.7
3.3
0.3
25
0.2
5
±1
±1
10
–10
–225
±1
0.2
2
0.12
1.4
3.4
3.2||
12.2||
10
12
pF
pF
mA
0.55
40
MAX
–1.2
UNIT
V
V
V
Ω
V
µA
µA
µA
µA
µA
mA
µA
mA
mA
mA/
MHz
VCC = 5.25 V,
VIN
≤
0.2 V,
VIN
≥
VCC – 0.2 V
VCC = 5.25 V, VIN = 3.4 V§, f1 = 0, Outputs open
VCC = 5.25 V, Outputs open, One input switching at 50% duty cycle,
OE = GND, VIN
≤
0.2 V or VIN
≥
VCC – 0.2 V
One bit switching
at f1 = 5 MHz
at 50% duty cycle
Eight bits switching
at f1 = 2.5 MHz
at 50% duty cycle
VIN
≤
0.2 V or
VIN
≥
VCC – 0.2V
VIN = 3.4 V or GND
VIN
≤
0.2 V or
VIN
≥
VCC – 0.2 V
VIN = 3.4 V or GND
IC#
VCC = 5 25 V,
5.25 V
Outputs open,
,
f0 = 10 MHz,
OE = GND
Ci
Co
† Typical values are at VCC = 5 V, TA = 25°C.
‡ Not more than one output should be shorted at a time. Duration of short should not exceed one second. The use of high-speed test apparatus
and/or sample-and-hold techniques are preferable to minimize internal chip heating and more accurately reflect operational values. Otherwise,
prolonged shorting of a high output can raise the chip temperature well above normal and cause invalid readings in other parametric tests. In
any sequence of parameter tests, IOS tests should be performed last.
§ Per TTL-driven input (VIN = 3.4 V); all other inputs at VCC or GND
¶ This parameter is derived for use in total power-supply calculations.
# IC
= ICC +
∆I
CC
×
DH
×
NT + ICCD (f0/2 + f1
×
N1)
Where:
IC
= Total supply current
ICC = Power-supply current with CMOS input levels
∆I
CC = Power-supply current for a TTL high input (VIN = 3.4 V)
= Duty cycle for TTL inputs high
DH
NT
= Number of TTL inputs at DH
ICCD = Dynamic current caused by an input transition pair (HLH or LHL)
f0
= Clock frequency for registered devices, otherwise zero
f1
= Input signal frequency
N1
= Number of inputs changing at f1
All currents are in milliamperes and all frequencies are in megahertz.
|| Values for these conditions are examples of the ICC formula.
4
POST OFFICE BOX 655303
•
DALLAS, TEXAS 75265
CY74FCT2374T
8-BIT REGISTER
WITH 3-STATE OUTPUTS
SCCS040A – SEPTEMBER 1994 – REVISED OCTOBER 2001
timing requirements over recommended operating free-air temperature range (unless otherwise
noted) (see Figure 1)
CY74FCT2374T
MIN
tw
tsu
th
Pulse duration, CP
Setup time, data before CP↑
Hold time, data after CP↑
7
2
1.5
MAX
CY74FCT2374AT
MIN
5
2
1.5
MAX
CY74FCT2374CT
MIN
4
1.5
1
MAX
UNIT
ns
ns
ns
switching characteristics over operating free-air temperature range (see Figure 1)
PARAMETER
tPLH
tPHL
tPZH
tPZL
tPHZ
tPLZ
FROM
(INPUT)
CP
TO
(OUTPUT)
O
O
O
CY74FCT2374T
MIN
2
2
1.5
1.5
1.5
1.5
MAX
10
10
12.5
12.5
8
8
CY74FCT2374AT
MIN
2
2
1.5
1.5
1.5
1.5
MAX
6.5
6.5
6.5
6.5
5.5
5.5
CY74FCT2374CT
MIN
2
2
1.5
1.5
1.5
1.5
MAX
5.2
5.2
6.2
6.2
5
5
UNIT
ns
ns
ns
OE
OE
POST OFFICE BOX 655303
•
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5
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