LOW SKEW, 1-TO-8, CRYSTAL OSCILLATOR/LVCMOS-
TO-3.3V, 2.5V LVPECL/LVCMOS FANOUT BUFFER
ICS8538I-26
G
ENERAL
D
ESCRIPTION
The ICS8538I-26 is a low skew, high performance
1-to-8 Crystal Oscillator/LVCMOS-to-3.3V, 2.5V
HiPerClockS™
LVPECL/LVCMOS Fanout Buffer and a member of
the HiPerClockS™ family of High Performance Clock
Solutions from IDT. The ICS8538I-26 has select-
able single ended clock or crystal inputs. The single ended clock
input accepts LVCMOS or LVTTL input levels and translate
them to 3.3V LVPECL levels. The output enable is internally
synchronized to eliminate runt pulses on the outputs during
asynchronous assertion/deassertion of the clock enable pin.
F
EATURES
•
Two differential 3.3V or 2.5V LVPECL outputs and
six single-ended 3.3V or 2.5V LVCMOS/LVTTL outputs
•
Selectable LVCMOS/LVTTL CLK or crystal inputs
•
CLK can accept the following input levels: LVCMOS, LVTTL
•
Maximum output frequency: 266MHz
•
Output skew: 60ps (maximum), LVPECL outputs
•
Part-to-part skew: 800ps (maximum)
•
Propagation delay: 2.05ns (maximum), LVPECL outputs
•
Additive phase jitter, RMS: 0.19ps (typical)
•
Operating supply modes:
LVPECL outputs:
Core/Output
3.3V/3.3V
2.5V/2.5V
LVCMOS outputs:
Core/Output
3.3V/3.3V
2.5V/2.5V
•
-40°C to 85°C ambient operating temperature
•
Available in lead-free (RoHS 6) package
IC
S
Guaranteed output and part-to-part skew characteristics make
the ICS8538I-26 ideal for those applications demanding well
defined performance and repeatability.
B
LOCK
D
IAGRAM
CLK_EN
Pullup
P
IN
A
SSIGNMENT
D
LE
CLK_EN
XTAL_IN
XTAL_OUT
V
CC
CLK
CLK_SEL
V
EE
Q0
nQ0
V
CCO
_
LVPECL
Q1
nQ1
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
Q7
V
CCO
_
LVCMOS
Q6
V
EE
Q5
V
CCO
_
LVCMOS
Q4
V
EE
Q3
V
CCO
_
LVCMOS
Q2
V
EE
CLK
Pulldown
0
LVPECL
Q0
nQ0
25MHz
XTAL_IN
OSC
XTAL_OUT
CLK_SEL
Pullup
1
Q1
nQ1
ICS8538I-26
Q2
LVCMOS
Q7
24-Lead TSSOP
4.40mm x 7.8mm x 0.925mm package body
G Package
Top View
IDT
™
/ ICS
™
3.3V LVPECL/ LVCMOS FANOUT BUFFER
1
ICS8538BGI-26 REV. B APRIL 14, 2009
ICS8538I-26
LOW SKEW, 1-TO-8, CRYSTAL OSCILLATOR/LVCMOS-TO-3.3V LVPECL/LVCMOS FANOUT BUFFER
T
ABLE
1. P
IN
D
ESCRIPTIONS
Number
1
2,
3
4
5
6
7, 13,
17, 21
8, 9
10
11, 12
14, 16,
18, 20,
22, 24
15, 19, 23
Name
CLK_EN
XTAL_IN,
XTAL_OUT
V
CC
CLK
CLK_SEL
V
EE
Q0, nQ0
V
CCO_LVPECL
Q1, nQ1
Q2, Q3,
Q4, Q5,
Q6, Q7
V
CCO_LVCMOS
Input
Input
Power
Input
Input
Power
Output
Power
Output
Output
Power
Type
Pullup
Description
Synchronizing clock enable. When HIGH, clock outputs follow clock
input. When LOW, Q outputs are forced low, nQ outputs are forced high.
See Table 3B. LVCMOS / LVTTL interface levels.
Cr ystal oscillator interface. XTAL_IN is the input.
XTAL_OUT is the output.
Positive supply pin.
Pulldown Clock input. LVCMOS / LVTTL interface levels.
Clock select input. When HIGH, selects XTAL inputs.
Pullup
When LOW, selects CLK input. LVCMOS / LVTTL interface levels.
Negative supply pins.
Differential clock outputs. LVPECL interface levels.
Output power supply mode for LVPECL clock outputs.
Differential clock outputs. LVPECL interface levels.
Single ended clock outputs. LVCMOS / LVTTL interface levels.
Output power supply mode for LVCMOS / LVTTL clock outputs.
NOTE:
Pullup
and
Pulldown
refer to internal input resistors. See Table 2, Pin Characteristics, for typical values.
T
ABLE
2. P
IN
C
HARACTERISTICS
Symbol
C
IN
C
PD
R
PULLUP
R
PULLDOWN
R
OUT
Parameter
Input Capacitance
Power Dissipation
Capacitance
(per LVCMOS output)
Input Pullup Resistor
Input Pulldown Resistor
Output Impedance
Q2:Q7
V
CCO_LVCMOS
= 3.465V
V
CCO_LVCMOS
= 2.625V
Test Conditions
Minimum
Typical
4
Q2:Q7
V
CC
, V
CCO_LVCMOS
= 3.465V
V
CC
, V
CCO_LVCMOS
= 2.625V
10
8
51
51
15
20
Maximum
Units
pF
pF
pF
kΩ
kΩ
Ω
Ω
IDT
™
/ ICS
™
3.3V LVPECL/ LVCMOS FANOUT BUFFER
2
ICS8538BGI-26 REV. B APRIL 14, 2009
ICS8538I-26
LOW SKEW, 1-TO-8, CRYSTAL OSCILLATOR/LVCMOS-TO-3.3V LVPECL/LVCMOS FANOUT BUFFER
T
ABLE
3A. C
ONTROL
I
NPUT
F
UNCTION
T
ABLE
Inputs
CLK_EN
0
0
1
CLK_SEL
0
1
0
Selected Source
CLK
XTAL_IN, XTAL_OUT
CLK
Q0, Q1
Disabled; LOW
Disabled; LOW
Enabled
Outputs
nQ0, nQ1
Disabled; HIGH
Disabled; HIGH
Enabled
Q2:Q7
Disabled; LOW
Disabled; LOW
Enabled
1
1
XTAL_IN, XTAL_OUT
Enabled
Enabled
Enabled
After CLK_EN switches, the clock outputs are disabled or enabled following a rising and falling input clock or
cr ystal oscillator edge as shown in
Figure
1.
In the active mode, the state of the outputs are a function of the CLK input as described in Table 3B.
Disabled
Enabled
CLK
CLK_EN
nQ0, nQ1
Q0:Q7
F
IGURE
1. CLK_EN T
IMING
D
IAGRAM
T
ABLE
3B. C
LOCK
I
NPUT
F
UNCTION
T
ABLE
Inputs
CLK
0
1
Q0, Q1
LOW
HIGH
Outputs
nQ0, nQ1
HIG H
LOW
Q2:Q7
LOW
HIGH
IDT
™
/ ICS
™
3.3V LVPECL/ LVCMOS FANOUT BUFFER
3
ICS8538BGI-26 REV. B APRIL 14, 2009
ICS8538I-26
LOW SKEW, 1-TO-8, CRYSTAL OSCILLATOR/LVCMOS-TO-3.3V LVPECL/LVCMOS FANOUT BUFFER
A
BSOLUTE
M
AXIMUM
R
ATINGS
Supply Voltage, V
CC
Inputs, V
I
(LVCMOS)
Outputs, V
O
(LVCMOS)
Inputs, V
I
(LVPECL)
Outputs, I
O
(LVPECL)
Continuous Current
Surge Current
Storage Temperature, T
STG
4.6V
-0.5V to V
CC
+ 0.5 V
-0.5V to V
CCO_LVCMOS
+ 0.5V
-0.5V to V
CC
+ 0.5V
50mA
100mA
-65°C to 150°C
NOTE: Stresses beyond those listed under Absolute
Maximum Ratings may cause permanent damage to the
device. These ratings are stress specifications only. Functional op-
eration of product at these conditions or any conditions beyond
those listed in the
DC Characteristics
or
AC Characteristics
is not
implied. Exposure to absolute maximum rating conditions for ex-
tended periods may affect product reliability.
Package Thermal Impedance,
θ
JA
87.8°C/W (0 mps)
T
ABLE
4A. P
OWER
S
UPPLY
DC C
HARACTERISTICS
,
V
CC
= V
CCO_LVPECL
= V
CCO_LVCMOS
= 3.3V±5%, V
EE
= 0V, T
A
= -40°C
TO
85°C
Symbol
V
CC
Parameter
Power Supply Voltage
Test Conditions
Minimum
3.135
3.135
Typical
3.3
3.3
Maximum
3.465
3.465
60
12
10
Units
V
V
mA
mA
mA
V
CCO_LVPECL,
Power Supply Voltage
V
CCO_LVCMOS
I
EE
I
CCO_LVPECL
I
CCO_LVCMOS
Power Supply Current
Power Supply Current
Power Supply Current
T
ABLE
4B. P
OWER
S
UPPLY
DC C
HARACTERISTICS
,
V
CC
= V
CCO_LVPECL
= V
CCO_LVCMOS
= 2.5V±5%, V
EE
= 0V, T
A
= -40°C
TO
85°C
Symbol
V
CC
Parameter
Power Supply Voltage
Test Conditions
Minimum
2.375
2.375
Typical
2.5
2.5
Maximum
2.625
2.625
60
12
10
Units
V
V
mA
mA
mA
V
CCO_LVPECL,
Power Supply Voltage
V
CCO_LVCMOS
I
EE
I
CCO_LVPECL
I
CCO_LVCMOS
Power Supply Current
Power Supply Current
Power Supply Current
IDT
™
/ ICS
™
3.3V LVPECL/ LVCMOS FANOUT BUFFER
4
ICS8538BGI-26 REV. B APRIL 14, 2009
ICS8538I-26
LOW SKEW, 1-TO-8, CRYSTAL OSCILLATOR/LVCMOS-TO-3.3V LVPECL/LVCMOS FANOUT BUFFER
T
ABLE
4C. LVCMOS / LVTTL DC C
HARACTERISTICS
,
T
A
= -40°C
TO
85°C
Symbol
V
IH
V
IL
V
HYS
I
IH
Parameter
Input High Voltage
Input Low Voltage
Input
Hysteresis
Input
High Current
Input
Low Current
CLK_EN,
CLK_SEL
CLK
CLK_EN,
CLK_SEL
CLK
CLK_EN,
CLK_SEL
Test Conditions
V
CC
= 3.3V
V
CC
= 2.5V
V
CC
= 3.3V
V
CC
= 2.5V
Minimum Typical
2
1.7
-0.3
-0.3
100
V
CC
= V
IN
= 3.465V or 2.625V
V
CC
= V
IN
= 3.465V or 2.625V
V
CC
= 3.465V or 2.625V, V
IN
= 0V
V
CC
= 3.465V or 2.625V, V
IN
= 0V
V
CCO_LVCMOS
= 3.465V
V
CCO_LVCMOS
= 2.625V
-5
-150
2. 6
1.8
15 0
5
Maximum
V
CC
+ 0.3
V
CC
+ 0.3
0. 8
0.7
Units
V
V
V
V
mV
µA
µA
µA
µA
V
V
I
IL
V
OH
Output High Voltage; NOTE 1
V
OL
Output Low Voltage; NOTE 1
V
CCO_LVCMOS
= 3.465V or 2.625V
0.5
V
NOTE 1: Outputs terminated with 50
Ω
to V
CCO_LVCMOS
/2. See Parameter Measurement Information Section. "LVCMOS Output
Load Test circuit" diagrams.
T
ABLE
4D. LVPECL DC C
HARACTERISTICS
,
V
CC
= V
CCO_LVPECL
= 3.3V±5%, V
EE
= 0V, T
A
= -40°C
TO
85°C
Symbol
V
OH
V
OL
V
SWING
Parameter
Output High Voltage; NOTE 1
Output Low Voltage; NOTE 1
Peak-to-Peak Output Voltage Swing
Test Conditions
Minimum
V
CCO_LVPECL
- 1.4
V
CCO_LVPECL
- 2.0
0. 6
Typical
Maximum
V
CCO_LVPECL
- 0.9
V
CCO_LVPECL
- 1.7
1.0
Units
V
V
V
NOTE 1: Outputs terminated with 50
Ω
to V
CCO_LVPECL
- 2V.
T
ABLE
4E. LVPECL DC C
HARACTERISTICS
,
V
CC
= V
CCO_LVPECL
= 2.5V±5%, V
EE
= 0V, T
A
= -40°C
TO
85°C
Symbol
V
OH
V
OL
V
SWING
Parameter
Output High Voltage; NOTE 1
Output Low Voltage; NOTE 1
Peak-to-Peak Output Voltage Swing
Test Conditions
Minimum
V
CCO_LVPECL
- 1.4
V
CCO_LVPECL
- 2.0
0.4
Typical
Maximum
V
CCO_LVPECL
- 0.9
V
CCO_LVPECL
- 1.5
1.0
Units
V
V
V
NOTE 1: Outputs terminated with 50
Ω
to V
CCO_LVPECL
- 2V.
T
ABLE
5. C
RYSTAL
C
HARACTERISTICS
Parameter
Mode of Oscillation
Frequency
Equivalent Series Resistance (ESR)
Shunt Capacitance
12
Test Conditions
Minimum Typical Maximum
Fundamental
40
50
7
MHz
Ω
pF
Units
IDT
™
/ ICS
™
3.3V LVPECL/ LVCMOS FANOUT BUFFER
5
ICS8538BGI-26 REV. B APRIL 14, 2009
FPGA/CPLD
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