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5962-8606317QYA

产品描述OTP ROM, 32KX8, 90ns, CMOS, CQCC32, WINDOWED, HERMETIC SEALED, LCC-32
产品类别存储    存储   
文件大小111KB,共19页
制造商e2v technologies
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5962-8606317QYA概述

OTP ROM, 32KX8, 90ns, CMOS, CQCC32, WINDOWED, HERMETIC SEALED, LCC-32

5962-8606317QYA规格参数

参数名称属性值
是否Rohs认证不符合
厂商名称e2v technologies
零件包装代码QFJ
包装说明QCCN, LCC32,.45X.55
针数32
Reach Compliance Codecompliant
ECCN代码EAR99
Base Number Matches1

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REVISIONS
LTR
A
DESCRIPTION
Add three vendors, 18324, 1FN41, and 66579. Add device types 04, 05,
06, and 07. Add margin test method C. Update vendor's PIN. Change
code indent. no. to 67268. Editorial changes throughout.
Add device type 08 with vendors CAGE 1FN41 and CAGE 66579.
Added time temperature regression equation for unbiased bake.
Removed vendor CAGE 66302. Made technical changes to table I, 4.2
back end margin test method step 3, 4.3.1 step C, table II, and table III.
Editorial changes throughout. Added vendor's PIN from XMB/883 to
either LM/883 for appropriate device types. Deleted the top CE waveform
on figure 6. This was incorrect for this device.
Added vendor CAGE 34335 to the drawing as a source of supply for
device types 01 through 07. Add vendor CAGE number 66579 to device
types 01 through 04, also add vendor CAGE number 01295 to devices
04XX and 05XX. Add test condition A to 4.2 and 4.3.2. Add margin test
method E for vendor CAGE number 34335. Change to vendor similar
PIN for vendor CAGE numbers 1FN41 and 66579. Change to figure 3,
margin test method C for vendor CAGE 01295 and change to
programming waveforms. Change to 4.5. Editorial changes throughout.
Add case outline Z for vendor CAGE number 1FN41.
Changes in accordance with NOR 5962-R130-92.
Add case outline U. Add device types 09 and 10. Remove vendor
27014 from drawing. Editorial changes throughout.
Changes in accordance with NOR 5962-R118-94.
Updated boilerplate. Added device types 11-21. Removed vendors
1FN41, 18324, 34335, and 61394 from drawing. Added vendor 65786
to drawing. Removed margin test methods from drawing.
DATE
(YR-MO-DA)
87-12-17
APPROVED
M. A. Frye
B
89-01-01
M. A. Frye
C
90-12-05
M. A. Frye
D
E
F
G
92-01-30
93-10-15
94-02-16
97-06-11
M. A. Frye
M. A. Frye
M. A. Frye
Raymond Monnin
THE ORIGINAL FIRST PAGE OF THIS DRAWING HAS BEEN REPLACED.
CURRENT CAGE CODE 67268
REV
SHEET
REV
SHEET
REV STATUS
OF SHEETS
G
15
G
16
REV
SHEET
G
1
G
2
G
3
G
4
G
5
G
6
G
7
G
8
G
9
G
10
G
11
G
12
G
13
G
14
PMIC N/A
PREPARED BY
James E. Jamison
CHECKED BY
Charles Reusing
APPROVED BY
Michael A. Frye
DRAWING APPROVAL DATE
87-02-12
REVISION LEVEL
G
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43216
STANDARD
MICROCIRCUIT
DRAWING
THIS DRAWING IS AVAILABLE
FOR USE BY ALL
DEPARTMENTS
AND AGENCIES OF THE
DEPARTMENT OF DEFENSE
MICROCIRCUIT, MEMORY, DIGITAL, CMOS, 262,144-BIT
UV ERASABLE PROM, MONOLITHIC SILICON
SIZE
A
SHEET
CAGE CODE
14933
1
OF
16
5962-86063
AMSC N/A
DSCC FORM 2233
APR 97
DISTRIBUTION STATEMENT A. Approved for public release; distribution is unlimited.
5962-E112-97

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