54ACT11000, 74ACT11000
QUADRUPLE 2-INPUT POSITIVE-NAND GATES
SCAS002A – D2957, JUNE 1987 – REVISED APRIL 1993
•
•
•
•
•
•
Inputs Are TTL-Voltage Compatible
Flow-Through Architecture Optimizes
PCB Layout
Center-Pin V
CC
and GND Configurations
Minimize High-Speed Switching Noise
EPIC
t
(Enhanced-Performance Implanted
CMOS) 1-
m
m Process
500-mA Typical Latch-Up Immunity at 125°C
Package Options Include Plastic
Small-Outline Packages, Ceramic Chip
Carriers, and Standard Plastic and
Ceramic 300-mil DIPs
54ACT11000 . . . J PACKAGE
74ACT11000 . . . D OR N PACKAGE
(TOP VIEW)
1A
1Y
2Y
GND
GND
3Y
4Y
4B
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
1B
2A
2B
V
CC
V
CC
3A
3B
4A
description
These devices contain four independent 2-input
NAND gates. They perform the Boolean functions
Y = A
S
B or Y = A + B in positive logic.
The 54ACT11000 is characterized for operation
over the full military temperature range of – 55°C
to 125°C. The 74ACT11000 is characterized for
operation from – 40°C to 85°C.
FUNCTION TABLE
(each gate)
INPUTS
A
H
L
X
B
H
X
L
OUTPUT
Y
L
H
H
54ACT11000 . . . FK PACKAGE
(TOP VIEW)
2B
VCC
2A
1B
NC
1A
1Y
4
5
6
7
8
3 2 1 20 19
18
17
16
15
14
9 10 11 12 13
NC
VCC
3A
3B
4A
NC
4B
4Y
1Y
2Y
3Y
4Y
NC – No internal connection
logic symbol
†
1A
1B
2A
2B
3A
3B
4A
4B
1
16
15
14
11
10
9
8
&
2
1Y
logic diagram (positive logic)
1A
1B
2A
2Y
2B
3A
3B
7
4Y
4A
4B
3
6
3Y
† This symbol is in accordance with ANSI/IEEE Std 91-1984
and IEC Publication 617-12.
Pin numbers shown are for the D, J, and N packages.
EPIC is a trademark of Texas Instruments Incorporated.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright
©
1993, Texas Instruments Incorporated
POST OFFICE BOX 655303
•
DALLAS, TEXAS 75265
2Y
GND
NC
GND
3Y
2–1
54ACT11000, 74ACT11000
QUADRUPLE 2-INPUT POSITIVE-NAND GATES
SCAS002A – D2957, JUNE 1987 – REVISED APRIL 1993
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
†
Supply voltage range, V
CC
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.5 V to 6 V
Input voltage range, V
I
(see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.5 V to V
CC
+ 0.5 V
Output voltage range, V
O
(see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.5 V to V
CC
+ 0.5 V
Input clamp current, I
IK
(V
I
< 0 or V
I
> V
CC
) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
±
20 mA
Output clamp current, I
OK
(V
O
< 0 or V
O
> V
CC
) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
±
50 mA
Continuous output current, I
O
(V
O
= 0 to V
CC
) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
±
50 mA
Continuous current through V
CC
or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
±
100 mA
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 65°C to 150°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
recommended operating conditions
54ACT11000
MIN
VCC
VIH
VIL
VI
VO
IOH
IOL
D
t /
D
v
TA
Supply voltage
High-level input voltage
Low-level input voltage
Input voltage
Output voltage
High-level output current
Low-level output current
Input transition rise or fall rate
Operating free-air temperature
0
– 55
0
0
4.5
2
0.8
VCC
VCC
– 24
24
10
125
0
– 40
0
0
MAX
5.5
74ACT11000
MIN
4.5
2
0.8
VCC
VCC
– 24
24
10
85
MAX
5.5
UNIT
V
V
V
V
V
mA
mA
ns/ V
°C
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
TEST CONDITIONS
IOH = – 50
m
A
VOH
IOH = – 24 mA
IOH = – 50 mA‡
IOH = – 75 mA‡
IOL = 50
m
A
VOL
IOL = 24 mA
IOL = 50 mA‡
IOL = 75 mA‡
II
ICC
VI = VCC or GND
VI = VCC or GND,
IO = 0
VCC
4.5 V
5.5 V
4.5 V
5.5 V
5.5 V
5.5 V
4.5 V
5.5 V
4.5 V
5.5 V
5.5 V
5.5 V
5.5 V
5.5 V
5.5
55V
5V
3.5
±
0.1
4
0.9
09
±
1
80
1
0.1
0.1
0.36
0.36
0.1
0.1
0.5
0.5
1.65
1.65
±
1
40
1
TA = 25°C
MIN
TYP
MAX
4.4
5.4
3.94
4.94
54ACT11000
MIN
4.4
5.4
3.7
4.7
3.85
3.85
0.1
0.1
0.44
0.44
V
MAX
74ACT11000
MIN
4.4
5.4
3.8
4.8
V
MAX
UNIT
m
A
m
A
mA
pF
D
ICC
w
Ci
One input at 3.4 V,
,
Other inputs at GND or VCC
VI = VCC or GND
‡ Not more than one output should be tested at a time, and the duration of the test should not exceed 10 ms.
§ This is the increase in supply current for each input that is at one of the specified TTL voltage levels rather than 0 V or VCC.
2–2
POST OFFICE BOX 655303
•
DALLAS, TEXAS 75265
54ACT11000, 74ACT11000
QUADRUPLE 2-INPUT POSITIVE-NAND GATES
SCAS002A – D2957, JUNE 1987 – REVISED APRIL 1993
switching characteristics over recommended ranges of supply voltage and free-air temperature
(unless otherwise noted) (see Figure 1)
PARAMETER
tPLH
tPHL
FROM
(INPUT)
A or B
TO
(OUTPUT)
Y
TA = 25°C
MIN
TYP
MAX
1.5
1.5
7.2
5.8
10.9
8
54ACT11000
MIN
1.5
1.5
MAX
13.3
9.5
74ACT11000
MIN
1.5
1.5
MAX
12.3
8.8
UNIT
ns
operating characteristics, V
CC
= 5 V, T
A
= 25°C
PARAMETER
Cpd
Power dissipation capacitance per gate
TEST CONDITIONS
CL = 50 pF,
f = 1 MHz
TYP
23
UNIT
pF
PARAMETER MEASUREMENT INFORMATION
From Output
Under Test
CL = 50 pF
(see Note A)
500
Ω
Output
Input
(see Note B)
tPHL
3V
1.5 V
1.5 V
0V
tPLH
VOH
50% VCC
VOL
50% VCC
LOAD CIRCUIT
VOLTAGE WAVEFORMS
NOTES: A. CL includes probe and jig capacitance.
B. Input pulses are supplied by generators having the following characteristics: PRR
≤
10 MHz, ZO = 50
Ω,
tr = 3 ns, tf = 3 ns.
C. The outputs are measured one at a time with one input transition per measurement.
Figure 1. Load Circuit and Voltage Waveforms
POST OFFICE BOX 655303
•
DALLAS, TEXAS 75265
2–3
PACKAGE MATERIALS INFORMATION
www.ti.com
17-Aug-2012
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SOIC
D
16
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
330.0
16.4
6.5
B0
(mm)
10.3
K0
(mm)
2.1
P1
(mm)
8.0
W
Pin1
(mm) Quadrant
16.0
Q1
74ACT11000DR
2500
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
17-Aug-2012
*All dimensions are nominal
Device
74ACT11000DR
Package Type
SOIC
Package Drawing
D
Pins
16
SPQ
2500
Length (mm)
333.2
Width (mm)
345.9
Height (mm)
28.6
Pack Materials-Page 2
嵌入式系统
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