FIN1028 3.3V LVDS 2-Bit High Speed Differential Receiver
March 2001
Revised May 2004
FIN1028
3.3V LVDS 2-Bit High Speed Differential Receiver
General Description
This dual receiver is designed for high speed interconnects
utilizing Low Voltage Differential Signaling (LVDS) technol-
ogy. The receiver translates LVDS levels, with a typical dif-
ferential input threshold of 100 mV, to LVTTL signal levels.
LVDS provides low EMI at ultra low power dissipation even
at high frequencies. This device is ideal for high speed
transfer of clock and data.
The FIN1028 can be paired with its companion driver, the
FIN1027, or any other LVDS driver.
Features
s
Greater than 400Mbs data rate
s
3.3V power supply operation
s
0.4ns maximum differential pulse skew
s
2.5ns maximum propagation delay
s
Low power dissipation
s
Power-Off protection
s
Fail safe protection for open-circuit, shorted and
terminated conditions
s
Meets or exceeds the TIA/EIA-644 LVDS standard
s
Flow-through pinout simplifies PCB layout
Ordering Code:
Order Number
FIN1028M
(Note 1)
FIN1028K8X
(Preliminary)
FIN1028MPX
(Preliminary)
Package Number
M08A
MAB08A
MLP08C
Package Description
8-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
8-Lead US8, JEDEC MO-187, Variation CA 3.1mm Wide
[TAPE and REEL]
8-Terminal Molded Leadless Package (MLP) Dual, MO-229, 2mm Square
[TAPE and REEL]
Note 1:
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Pin Descriptions
Pin Name
R
OUT1
, R
OUT2
R
IN1+
, R
IN2+
R
IN1−
, R
IN2−
V
CC
GND
Description
LVTTL Data Outputs
Non-inverting LVDS Inputs
Inverting LVDS Inputs
Power Supply
Ground
Connection Diagrams
Pin Assignment for SOIC
Function Table
Input
R
IN+
L
H
R
IN+
H
L
Outputs
R
OUT
L
H
H
(Top View)
Terminal Assignments for MLP
Fail Safe Condition
H
=
HIGH Logic Level
L
=
LOW Logic Level
Fail Safe
=
Open, Shorted, Terminated
(Top Through View)
© 2004 Fairchild Semiconductor Corporation
DS500503
www.fairchildsemi.com
FIN1028
Absolute Maximum Ratings
(Note 2)
Supply Voltage (V
CC
)
DC Input Voltage (R
INx+
, R
INx−
)
DC Output Voltage (R
OUTx
)
DC Output Current (I
O
)
Storage Temperature Range (T
STG
)
Max Junction Temperature (T
J
)
Lead Temperature (T
L
)
(Soldering, 10 seconds)
ESD (Human Body Model)
ESD (Machine Model)
260
°
C
−
0.5V to
+
4.6V
−
0.5V to
+
4.7V
−
0.5V to
+
6V
16 mA
Recommended Operating
Conditions
Supply Voltage (V
CC
)
Input Voltage (V
IN
)
Magnitude of Differential Voltage
(|V
ID
|)
Common-mode Input Voltage
(V
IC
)
Operating Temperature (T
A
)
0.05V to 2.35V
100 mV to V
CC
3.0V to 3.6V
0 to V
CC
−
65
°
C to
+
150
°
C
150
°
C
−
40
°
C to
+
85
°
C
≥
6500V
≥
300V
Note 2:
The “Absolute Maximum Ratings”: are those values beyond which
damage to the device may occur. The databook specifications should be
met, without exception, to ensure that the system design is reliable over its
power supply, temperature and output/input loading variables. Fairchild
does not recommend operation of circuits outside databook specification.
DC Electrical Characteristics
Over supply voltage and operating temperature ranges, unless otherwise specified
Symbol
V
TH
V
TL
I
IN
I
I(OFF)
V
OH
V
OL
V
IK
I
CC
C
IN
C
OUT
Parameter
Differential Input Threshold HIGH
Differential Input Threshold LOW
Input Current
Power-OFF Input Current
Output HIGH Voltage
Output LOW Voltage
Input Clamp Voltage
Power Supply Current
Input Capacitance
Output Capacitance
Test Conditions
See Figure 1 and Table 1
See Figure 1 and Table 1
V
IN
=
0V or V
CC
V
CC
=
0V, V
IN
=
0V or 3.6V
I
OH
= −100 µA
I
OH
= −8
mA
I
OH
=
100
µA
I
OL
=
8 mA
I
IK
= −18
mA
(R
IN
+
=
1V and R
IN
−
=
1.4V) or
(R
IN
+
=
1.4V and R
IN
−
=
1V)
4
6
−1.5
9
V
CC
−0.2
2.4
0.2
0.5
−100
±20
±20
Min
Typ
(Note 3)
100
Max
Units
mV
mV
µA
µA
V
V
V
mA
pF
pF
Note 3:
All typical values are at T
A
=
25°C and with V
CC
=
3.3V.
AC Electrical Characteristics
Over supply voltage and operating temperature ranges, unless otherwise specified
Symbol
t
PLH
t
PHL
t
TLH
t
THL
t
SK(P)
t
SK(LH)
,
t
SK(HL)
t
SK(PP)
Parameter
Differential Propagation Delay
LOW-to-HIGH
Differential Propagation Delay
HIGH-to-LOW
Output Rise Time (20% to 80%)
Output Fall Time (80% to 20%)
Pulse Skew |t
PLH
- t
PHL
|
Channel-to-Channel Skew
(Note 5)
Part-to-Part Skew (Note 6)
|V
ID
|
=
400 mV, C
L
=
10 pF,
See Figure 1 and Figure 2
Test Conditions
Min
Typ
(Note 4)
0.9
0.9
0.5
0.5
0.4
0.3
1.0
2.5
2.5
Max
Units
ns
ns
ns
ns
ns
ns
ns
Note 4:
All typical values are at T
A
=
25°C and with V
CC
=
3.3V.
Note 5:
t
SK(LH)
, t
SK(HL)
is the skew between specified outputs of a single device when the outputs have identical loads and are switching in the same direc-
tion.
Note 6:
t
SK(PP)
is the magnitude of the difference in propagation delay times between any specified terminals of two devices switching in the same direction
(either LOW-to-HIGH or HIGH-to-LOW) when both devices operate with the same supply voltage, same temperature, and have identical test circuits.
www.fairchildsemi.com
2
FIN1028
Note A:
All input pulses have frequency
=
10 MHz, t
R
or t
F
=
1 ns
Note B:
C
L
includes all probe and fixture capacitances
FIGURE 1. Differential Driver Propagation Delay and Transition Time Test Circuit
TABLE 1. Receiver Minimum and Maximum Input Threshold Test Voltages
Applied Voltages (V)
V
IA
1.25
1.15
2.4
2.3
0.1
0
1.5
0.9
2.4
1.8
0.6
0
V
IB
1.15
1.25
2.3
2.4
0
0.1
0.9
1.5
1.8
2.4
0
0.6
Resulting Differential
Input Voltage (mV)
V
ID
100
−100
100
−100
100
−100
600
−600
600
−600
600
−600
Resulting Common Mode
Input Voltage (V)
V
IC
1.2
1.2
2.35
2.35
0.05
0.05
1.2
1.2
2.1
2.1
0.3
0.3
FIGURE 2. AC Waveforms
3
www.fairchildsemi.com
FIN1028
DC /AC Typical Performance Curves
FIGURE 3. Output High Voltage vs.
Power Supply Voltage
FIGURE 4. Output Low Voltage vs.
Power Supply Voltage
FIGURE 5. Output Short Circuit Current vs.
Power Supply Voltage
FIGURE 6. Power Supply Current vs.
Frequency
FIGURE 7. Power Supply Current vs.
Ambient Temperature
FIGURE 8. Differential Propagation Delay vs.
Power Supply Voltage
www.fairchildsemi.com
4
FIN1028
DC /AC Typical Performance Curves
(Continued)
FIGURE 9. Differential Propagation Delay vs.
Ambient Temperature
FIGURE 10. Differential Skew (t
PLH
- t
PHL
) vs.
Power Supply Voltage
FIGURE 11. Differential Skew (t
PHL
- t
PHL
) vs.
Ambient Temperature
FIGURE 12. Differential Propagation Delay vs.
Differential Input Voltage
FIGURE 13. Differential Propagation Delay vs.
Common-Mode Voltage
FIGURE 14. Transition Time vs.
Power Supply Voltage
5
www.fairchildsemi.com
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
