H8S/2633 Series
H8S/2633
HD6432633
H8S/2632
HD6432632
H8S/2631
HD6432631
H8S/2633 F-ZTAT™
HD64F2633
H8S/2633R F-ZTAT™
HD64F2633R
H8S/2695
HD6432695
Hardware Manual
ADE-602-165C
Rev. 4.0
8/29/02
Hitachi, Ltd.
Cautions
1. Hitachi neither warrants nor grants licenses of any rights of Hitachi’s or any third party’s
patent, copyright, trademark, or other intellectual property rights for information contained in
this document. Hitachi bears no responsibility for problems that may arise with third party’s
rights, including intellectual property rights, in connection with use of the information
contained in this document.
2. Products and product specifications may be subject to change without notice. Confirm that you
have received the latest product standards or specifications before final design, purchase or
use.
3. Hitachi makes every attempt to ensure that its products are of high quality and reliability.
However, contact Hitachi’s sales office before using the product in an application that
demands especially high quality and reliability or where its failure or malfunction may directly
threaten human life or cause risk of bodily injury, such as aerospace, aeronautics, nuclear
power, combustion control, transportation, traffic, safety equipment or medical equipment for
life support.
4. Design your application so that the product is used within the ranges guaranteed by Hitachi
particularly for maximum rating, operating supply voltage range, heat radiation characteristics,
installation conditions and other characteristics. Hitachi bears no responsibility for failure or
damage when used beyond the guaranteed ranges. Even within the guaranteed ranges,
consider normally foreseeable failure rates or failure modes in semiconductor devices and
employ systemic measures such as fail-safes, so that the equipment incorporating Hitachi
product does not cause bodily injury, fire or other consequential damage due to operation of
the Hitachi product.
5. This product is not designed to be radiation resistant.
6. No one is permitted to reproduce or duplicate, in any form, the whole or part of this document
without written approval from Hitachi.
7. Contact Hitachi’s sales office for any questions regarding this document or Hitachi
semiconductor products.
General Precautions on the Handling of Products
1. Treatment of NC Pins
Note: Do not connect anything to the NC pins.
The NC (not connected) pins are either not connected to any of the internal circuitry; or
are used as test pins or to reduce noise. If something is connected to the NC pins, the
operation of the LSI is not guaranteed.
2. Treatment of Unused Input Pins
Note: Fix all unused input pins to high or low level.
Generally, the input pins of CMOS products are high-impedance input pins. If unused pins
are in their open states, intermediate levels are induced by noise in the vicinity, a pass-
through current flows internally, and a malfunction may occur.
3. Processing before Initialization
Note: When power is first supplied, the product’s state is undefined. The states of internal
circuits are undefined until full power is supplied throughout the chip and a low level is
input on the reset pin. During the period where the states are undefined, the register
settings and the output state of each pin are also undefined. Design your system so that it
does not malfunction because of processing while it is in this undefined state. For those
products which have a reset function, reset the LSI immediately after the power supply has
been turned on.
4. Prohibition of Access to Undefined or Reserved Address
Note: Access to undefined or reserved addresses is prohibited.
The undefined or reserved addresses may be used to expand functions, or test registers
may have been be allocated to these address. Do not access these registers: the system’s
operation is not guaranteed if they are accessed.
Preface
These LSIs are high-performance microcomputers with a 32-bit H8S/2600 CPU core and a variety
of built-in peripheral functions necessary for a system configuration.
The built-in peripheral devices include a 16-bit timer pulse unit (TPU), a programmable pulse
generator (PPG)*
1
, a watchdog timer (WDT), 8-bit timers, a 14-bit PWM timer (PWM)*
1
, serial
communication interfaces (SCI, IrDA)*
1
, an A/D converter, a D/A converter*
1
, and I/O ports. An
I
2
C bus interface (IIC)*
1
can also be incorporated as an option. An on-chip DMA controller
(DMAC)*
1
and data transfer controller (DTC) perform high-speed data transfer without using the
CPU, enabling use of these LSIs as embedded microcomputers in various advanced control
systems. Two types of internal ROM-flash memory (F-ZTAT™*
2
) and mask ROM-are available,
providing a quick and flexible response to conditions from ramp-up through full-scale volume
production, even for applications with frequently changing specifications.
Notes: *1 This function is not available in the H8S/2695.
*2
F-ZTAT is a trademark of Hitachi, Ltd.
Target Users: This manual was written for users who will be using the H8S/2633 Series,
H8S/2633R, or H8S/2695 in the design of application systems. Readers are
expected to understand the fundamentals of electrical circuits, logic circuits, and
microcomputers.
Objective:
This manual was written to provide users with an explanation of the hardware
functions and electrical characteristics of the H8S/2633 Series, H8S/2633R, and
H8S/2695. Refer to the H8S/2600 Series, H8S/2000 Series Programming Manual
for a detailed description of the instruction set.
Notes on reading this manual:
•
In order to understand the overall functions of the chip
Read the manual according to the contents. This manual is broadly divided into parts covering
the CPU, system control functions, peripheral functions, and electrical characteristics.
•
In order to understand the details of the CPU's functions
Refer to the H8S/2600 Series, H8S/2000 Series Programming Manual.
Example: Bit order: The MSB is on the left and the LSB is on the right.
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