Preface
The H8/300L Series of single-chip microcomputers has the high-speed H8/300L CPU at its core,
with many necessary peripheral functions on-chip. The H8/300L CPU instruction set is
compatible with the H8/300 CPU.
The H8/3937 Series and H8/3937R Series include, a FLEX™ decoder*, five kinds of timers, a 2-
channel serial communication interface, and an A/D converter, as on-chip peripheral functions
necessary for system configuration. The configuration of these series makes them ideal for use as
embedded microcomputers in pagers using the FLEX™ decoder system.
The H8/3937 Series supports non-roaming, while the H8/3937R Series supports roaming.
This manual describes the hardware of the H8/3937 Series and H8/3937R Series. For details on
H8/3937 Series and 3937R Series instruction set, refer to the H8/300L Series Programming
Manual.
Note: * FLEX is a trademark of Motorola Inc.
Contents
Section 1
1.1
1.2
1.3
Overview
............................................................................................................
Overview ............................................................................................................................
Internal Block Diagram ......................................................................................................
Pin Arrangement and Functions.........................................................................................
1.3.1 Pin Arrangement ...................................................................................................
1.3.2 Pin Functions.........................................................................................................
1
1
5
6
6
7
Section 2
2.1
CPU
..................................................................................................................... 13
13
13
14
14
15
15
15
16
17
18
19
20
20
22
26
28
30
31
31
33
37
39
40
42
42
43
45
45
46
46
46
i
2.2
2.3
2.4
2.5
2.6
2.7
Overview ............................................................................................................................
2.1.1 Features .................................................................................................................
2.1.2 Address Space.......................................................................................................
2.1.3 Register Configuration ..........................................................................................
Register Descriptions .........................................................................................................
2.2.1 General Registers ..................................................................................................
2.2.2 Control Registers...................................................................................................
2.2.3 Initial Register Values...........................................................................................
Data Formats ......................................................................................................................
2.3.1 Data Formats in General Registers .......................................................................
2.3.2 Memory Data Formats ..........................................................................................
Addressing Modes..............................................................................................................
2.4.1 Addressing Modes.................................................................................................
2.4.2 Effective Address Calculation...............................................................................
Instruction Set ....................................................................................................................
2.5.1 Data Transfer Instructions.....................................................................................
2.5.2 Arithmetic Operations...........................................................................................
2.5.3 Logic Operations...................................................................................................
2.5.4 Shift Operations ....................................................................................................
2.5.5 Bit Manipulations..................................................................................................
2.5.6 Branching Instructions ..........................................................................................
2.5.7 System Control Instructions..................................................................................
2.5.8 Block Data Transfer Instruction............................................................................
Basic Operational Timing ..................................................................................................
2.6.1 Access to On-Chip Memory (RAM, ROM) .........................................................
2.6.2 Access to On-Chip Peripheral Modules................................................................
CPU States .........................................................................................................................
2.7.1 Overview...............................................................................................................
2.7.2 Program Execution State.......................................................................................
2.7.3 Program Halt State ................................................................................................
2.7.4 Exception-Handling State .....................................................................................
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