®
HI-200/883
Data Sheet
January 30, 2006
FN6059.2
Dual SPST CMOS Analog Switch
The HI-200/883 is a monolithic device comprising two
independently selectable SPST switchers which feature fast
switching speeds (240ns typical) combined with low power
dissipation (15mW typical @ +25°C).
Each switch provides low “ON” resistance operation for input
signal voltages up to the supply rails and for signal currents
up to 25mA continuous. Rugged DI construction eliminates
latch-up and substrate SCR failure modes.
All devices provide break-before-make switching and are
TTL and CMOS compatible for maximum application
versatility. HI-200/883 is an ideal component for use in high
frequency analog switching. Typical applications include
signal path switching, sample and hold circuits, digital filters,
and op amp gain switching networks.
Features
• This Circuit is Processed in Accordance to MIL-STD-883
and is Fully Conformant Under the Provisions of
Paragraph 1.2.1.
• Low “On” Release . . . . . . . . . . . . . . . . . . . . . . .100Ω Max
• Wide Analog Signal Range . . . . . . . . . . . . . . . . . . . .±15V
• TTL/CMOS Compatible . . . . . . . . . . . . . . 2.4V (Logic “1”)
• Turn-On Time. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 500ns
• Analog Current Range (Continuous) . . . . . . . . . . . . 25mA
• No Latch-Up
• Replaces DG200
Applications
• High Frequency Analog Switching
• Sample and Hold Circuits
• Digital Filters
Functional Diagram
V+
V
REF
INPUT
SOURCE
LOGIC
INPUT
GATE
REFERENCE,
LEVEL SHIFTER,
AND DRIVER
SWITCH
CELL
GATE
• Op Amp Gain Switching Networks
Ordering Information
PART NUMBER
OUTPUT
DRAIN
TEMP.
RANGE (°C)
-55 to 125
PACKAGE
10 Pin Metal Can
PKG.
DWG. #
T10.B
HI2-0200/883
V-
Pinout
HI2-200/883 (METAL CAN)
TOP VIEW
V+
10
A
1
A
2
2
1
9
IN1
8
7
4
5
OUT2
6
V-
OUT1
V
REF
GND 3
IN2
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
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HI-200/883
Absolute Maximum Ratings
Voltage Between V+ and V- Terminals . . . . . . . . . . . . . . . . . . . .40V
±V
SUPPLY
to Ground (V+, V-)
. . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20V
Analog Input Voltage, (+V
S
) . . . . . . . . . . . . . . . . . . +V
SUPPLY
+2V
Analog Input Voltage,
(-V
S
) . . . . . . . . . . . . . . . . . . . . -V
SUPPLY
-2V
Digital Input Voltage, (+V
A
) . . . . . . . . . . . . . . . . . . . +V
SUPPLY
+4V
Digital Input Voltage,
(-V
A
). . . . . . . . . . . . . . . . . . . . . -V
SUPPLY
-4V
Peak Current (S or D)
(Pulse at 1ms, 10% Duty Cycle Max). . . . . . . . . . . . . . . . . . 40mA
Continuous Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25mA
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +175°C
Storage Temperature Range . . . . . . . . . . . . . . . . . .-65°C to +150°C
Lead Temperature (Soldering 10s)
. . . . . . . . . . . . . . . . . . . . . . ≤275°C
Thermal Information
Thermal Resistance
θ
JA
(°C/W)
θ
JC
(°C/W)
Metal Can Package . . . . . . . . . . . . . . .
160
75
Package Power Dissipation at +75°C
Metal Can Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.62W/°C
Package Power Dissipation Derating Factor above +75°C
Metal Can Package . . . . . . . . . . . . . . . . . . . . . . . . . . .8.24mW/°C
Recommended Operating Conditions
Operating Temperature Range . . . . . . . . . . . . . . . .-55°C to +125°C
Operating Supply Voltage Range (±V
SUPPLY
)
. . . . . . . . . . . . . . ±15V
Analog Input Voltage (V
S
) . . . . . . . . . . . . . . . . . . . . . . . .
±V
SUPPLY
Logic Low Level (V
AL
) . . . . . . . . . . . . . . . . . . . . . . . . . . . 0V to 0.8V
Logic High Level (V
AH
) . . . . . . . . . . . . . . . . . . . . 2.4V to
+V
SUPPLY
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
TABLE 1. D.C. ELECTRICAL PERFORMANCE SPECIFICATIONS
Device Tested at:
+V
SUPPLY
=
+15V, −V
SUPPLY
=
−15V,
V
REF
= OPEN, GND = 0V, Unless Otherwise Specified.
D.C. PARAMETERS
Switch
“ON”
Resistance
SYMBOL
r
DS
CONDITIONS
V
A
= 0.8V, V
S
= 10V, I
D
= -1mA,
All Unused Channels V
A
= 0.8V
V
A
= 0.8V, V
S
= -10V, I
D
= 1mA,
All Unused Channels V
A
= 0.8V
Source “OFF”
Leakage Current
I
S(OFF)
V
S
= +14V, V
D
= -14V, V
A
= 2.4V,
All Unused Channels V
A
= 2.4V,
V
D
= +14V, V
S
= -14V
V
S
= -14V, V
D
= +14V, V
A
= 2.4V,
All Unused Channels V
A
= 2.4V,
V
D
= -14V, V
S
= +14V
Drain “OFF”
Leakage Current
I
D(OFF)
V
D
= -14V, V
S
= +14V, V
A
= 2.4V,
All Unused Channels V
A
= 2.4V,
V
D
= +14V, V
S
= -14V
V
D
= +14V, V
S
= -14V, V
A
= 2.4V,
All Unused Channels V
A
= 2.4V,
V
D
= -14V, V
S
= +14V
Channel “ON”
Leakage Current
I
D(ON)
V
D
= V
S
= +14V, V
A
= 0.8V,
All Unused Channels V
A
= 0.8V,
V
D
= V
S
= -14V
V
D
= V
S
= -14V, V
A
= 0.8V,
All Unused Channels V
A
= 0.8V,
V
D
= V
S
= +14V
Low Level
Input Current
High Level
Input Current
Supply Current
I
AL
V
AL
= 0.8V
All Channels V
A
= 2.4V
V
AH
= 2.4V
All Channels V
AH
= 4.0V
All Channels V
A
= 0V
GROUP A
SUBGROUPS
1
2, 3
1
2, 3
1
2, 3
1
2, 3
1
2, 3
1
2, 3
1
2, 3
1
2, 3
1
2, 3
1
2, 3
1
2, 3
All Channels V
A
= 3V
1
2, 3
TEMPERATURE
(°C)
25
-55 to 125
25
-55 to 125
25
-55 to 125
25
-55 to 125
25
-55 to 125
25
-55 to 125
25
-55 to 125
25
-55 to 125
25
-55 to 125
25
-55 to 125
25
-55 to 125
25
-55 to 125
MIN
-
-
-
-
-5
-500
-5
-500
-5
-500
-5
-500
-5
-500
-5
-500
-1.0
-1.0
-1.0
-1.0
-
-
-
-
MAX
70
100
70
100
5
500
5
500
5
500
5
500
5
500
5
500
1.0
1.0
1.0
1.0
2.0
2.0
2.0
2.0
UNITS
Ω
Ω
Ω
Ω
nA
nA
nA
nA
nA
nA
nA
nA
nA
nA
nA
nA
µA
µA
µA
µA
µA
µA
mA
mA
I
AH
+I
CC
2
FN6059.2
January 30, 2006
HI-200/883
TABLE 1. D.C. ELECTRICAL PERFORMANCE SPECIFICATIONS (Continued)
Device Tested at:
+V
SUPPLY
=
+15V, −V
SUPPLY
=
−15V,
V
REF
= OPEN, GND = 0V, Unless Otherwise Specified.
D.C. PARAMETERS
Supply Current
SYMBOL
-I
CC
CONDITIONS
All Channels V
A
= 0V
GROUP A
SUBGROUPS
1
2, 3
All Channels V
A
= 3V
1
2, 3
TEMPERATURE
(°C)
25
-55 to 125
25
-55 to 125
MIN
-2.0
-2.0
-2.0
-2.0
MAX
-
-
-
-
UNITS
µA
µA
µA
µA
TABLE 2. A.C. ELECTRICAL PERFORMANCE SPECIFICATIONS
Device Tested at:
+V
SUPPLY
=
+15V, −V
SUPPLY
=
−15V,
V
REF
= OPEN, GND = 0V, Unless Otherwise Specified.
GROUP A
SUB-
GROUPS
9
10, 11
9
10, 11
TEMPERATURE
(°C)
25
55 to 125
25
55 to 125
PARAMETERS
Turn “ON” Time
SYMBOL
t
ON
CONDITIONS
C
L
= 35pF,
R
L
= 1kΩ
C
L
= 33pF,
R
L
= 1kΩ
MIN
-
-
-
-
MAX
500
800
500
650
UNITS
ns
ns
ns
ns
Turn “OFF” Time
t
OFF
TABLE 3. ELECTRICAL PERFORMANCE SPECIFICATIONS (NOTE 1)
Device Tested at:
+V
SUPPLY
=
+15V, −V
SUPPLY
=
−15V,
V
REF
= OPEN, GND = 0V
PARAMETERS
Address Capacitance
Switches Input
Capacitance
Switch Output Capacitance
SYMBOL
C
A
C
S (OFF)
C
D (OFF)
C
D (ON)
Drain to Source
Capacitance
Off Isolation
Cross Talk
Charge Transfer Error
NOTE:
1. Parameters listed in Table 2 are controlled via design or process parameters and are not directly tested at final production. These parameters
are lab characterized upon initial design release, or upon design changes. These parameters are guaranteed by characterization based upon
data from multiple production runs which reflect lot to lot and within lot variation.
TABLE 4. ELECTRICAL TEST REQUIREMENTS
MIL-STD-883 TEST REQUIREMENTS
Interim Electrical Parameters (Pre Burn-in)
Final Electrical Test Parameters
Group A Test Requirements
Groups C & D Endpoints
NOTE:
2. PDA applies to Subgroup 1 only.
SUBGROUPS
(Tables 1 and 2)
1
1 (Note 2), 2, 3, 9, 10, 11
1, 2, 3, 9, 10, 11
1
C
DS
V
ISO
V
CT
V
CTE
CONDITIONS
f = 1MHz, V
AL
= 0V
f = 1MHz, V
AH
= 5V,
Measured Source to GND
f = 1MHz, V
AH
= 5V,
Measured Output to Ground
f = 1MHz, V
AL
= 0V,
Measured Output to Ground
f = 1MHz, V
AH
= 5V
f = 200kHz, V
A
= 2.4, R
L
= 1K,
V
GEN
= 1V
P-P,
C
L
= 10pF
f = 200kHz, V
A
= 2.4, R
L
= 1K,
V
GEN
= 1V
P-P,
C
L
= 10pF
f = 200kHz, V
A
= 0 to 4V,
C
L
= 0.01µF
NOTE
1
1
1
1
1
1
1
1
TEMPERATURE
(°C)
25
25
25
25
25
25
25
25
MIN
-
-
-
-
-
55
60
-10
MAX
20
20
20
30
2.0
-
-
10
UNITS
pF
pF
pF
pF
pF
dB
dB
mV
3
FN6059.2
January 30, 2006
HI-200/883
Test Circuits
+V
CC
S
+V
CC
D
I
D
S
V
IN
I
IN
D
V
S
V
D
V
IN
GND
-V
CC
GND
-V
CC
FIGURE 1. INPUT LEAKAGE CURRENT
FIGURE 2. I
D (OFF)
+V
CC
V
S
S
I
S
V
D
V
IN
+V
CC
S
D
I
D(ON)
V
IN
V
GND
-V
CC
GND
-V
CC
FIGURE 3. I
S (OFF)
FIGURE 4. I
D (ON)
+V
CC
I
1
15V
S
D
STEP
GENERATOR
IN
1
V+ IN
3
S
1
V
IN
TEST
POINT
0.01µF
TEST
POINT
0.01µF
D
1
IN
2
S
2
GND
I
2
D
2
V-
S
3
D
3
IN
4
S
4
D
4
GND
TEST
POINT
0.01µF
TEST
POINT
0.01µF
STEP
GENERATOR
(SEE NOTE)
-15V GND
-V
CC
FIGURE 5. SUPPLY CURRENTS
FIGURE 6. CHARGE TRANSFER ERROR
4
FN6059.2
January 30, 2006
HI-200/883
Test Circuits
(Continued)
15V
+V
CC
SINE WAVE
GENERATOR
D
TEST
POINT
V
IN
V
D
1kΩ
2.4V
24V
IN
1
V+ IN
3
S
1
D
1
IN
2
S
2
TEST
POINT
D
2
V-
S
3
D
3
IN
4
S
4
D
4
GND
TEST
POINT
1kΩ
2.4V
TEST
POINT
SINE WAVE
GENERATOR
S
1kΩ
1kΩ
GND
-V
CC
-15V GND
FIGURE 7. R
DS
FIGURE 8. OFF CHANNEL ISOLATION
24V
0.8V
TEST
POINT
1kΩ
TEST
POINT
1kΩ
24V
0.8V
15V
IN
1
V+ IN
3
S
1
D
1
IN
2
S
2
D
2
V-
S
3
D
3
IN
4
S
4
D
4
GND
24V
0.8V
1kΩ
TEST
POINT
24V
0.8V
1kΩ
TEST
POINT
1kΩ
STEP
GENERATOR
-15V GND
FIGURE 9. CROSSTALK BETWEEN CHANNELS
5
FN6059.2
January 30, 2006
测试/测量
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