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74VCX162601MTD

产品描述Low Voltage 18-Bit Universal Bus Transceivers with 3.6V Tolerant Inputs and Outputs and 26з Series Resistors in the B-Port Outputs
产品类别逻辑    逻辑   
文件大小142KB,共10页
制造商Fairchild
官网地址http://www.fairchildsemi.com/
标准
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74VCX162601MTD概述

Low Voltage 18-Bit Universal Bus Transceivers with 3.6V Tolerant Inputs and Outputs and 26з Series Resistors in the B-Port Outputs

74VCX162601MTD规格参数

参数名称属性值
是否Rohs认证符合
厂商名称Fairchild
零件包装代码TSSOP
包装说明TSSOP, TSSOP56,.3,20
针数56
Reach Compliance Codeunknow
其他特性WITH INDEPENDENT OUTPUT ENABLE FOR EACH DIRECTION
控制类型INDEPENDENT CONTROL
计数方向BIDIRECTIONAL
系列ALVC/VCX/A
JESD-30 代码R-PDSO-G56
JESD-609代码e3
长度14 mm
负载电容(CL)30 pF
逻辑集成电路类型REGISTERED BUS TRANSCEIVER
最大I(ol)0.012 A
湿度敏感等级2
位数18
功能数量1
端口数量2
端子数量56
最高工作温度85 °C
最低工作温度-40 °C
输出特性3-STATE WITH SERIES RESISTOR
输出极性TRUE
封装主体材料PLASTIC/EPOXY
封装代码TSSOP
封装等效代码TSSOP56,.3,20
封装形状RECTANGULAR
封装形式SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
包装方法RAIL
峰值回流温度(摄氏度)260
电源3.3 V
Prop。Delay @ Nom-Su3.8 ns
传播延迟(tpd)19.6 ns
认证状态Not Qualified
座面最大高度1.1 mm
最大供电电压 (Vsup)3.6 V
最小供电电压 (Vsup)1.4 V
标称供电电压 (Vsup)1.5 V
表面贴装YES
技术CMOS
温度等级INDUSTRIAL
端子面层Matte Tin (Sn)
端子形式GULL WING
端子节距0.5 mm
端子位置DUAL
处于峰值回流温度下的最长时间NOT SPECIFIED
翻译N/A
触发器类型POSITIVE EDGE
宽度6.1 mm
Base Number Matches1

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74VCX162601 Low Voltage 18-Bit Universal Bus Transceivers with 3.6V Tolerant Inputs and Outputs and 26Ω
Series Resistors in the B-Port Outputs
April 1998
Revised October 2004
74VCX162601
Low Voltage 18-Bit Universal Bus Transceivers
with 3.6V Tolerant Inputs and
Outputs and 26
Series Resistors in the B-Port Outputs
General Description
The VCX162601, 18-bit universal bus transceiver, com-
bines D-type latches and D-type flip-flops to allow data flow
in transparent, latched, and clocked modes.
Data flow in each direction is controlled by output-enable
(OEAB and OEBA), latch-enable (LEAB and LEBA), and
clock (CLKAB and CLKBA) inputs. The clock can be con-
trolled by the clock-enable (CLKENAB and CLKENBA)
inputs. For A-to-B data flow, the device operates in the
transparent mode when LEAB is HIGH. When LEAB is
LOW, the A data is latched if CLKAB is held at a HIGH-to-
LOW logic level. If LEAB is LOW, the A bus data is stored
in the latch/flip-flop on the LOW-to-HIGH transition of
CLKAB. Output-enable OEAB is active-LOW. When OEAB
is HIGH, the outputs are in the HIGH-impedance state.
Data flow for B to A is similar to that of A to B but uses
OEBA, LEBA, CLKBA and CLKENBA.
The 74VCX162601 is designed for low voltage (1.4V to
3.6V) V
CC
applications with I/O compatibility up to 3.6V.
The VCX162601 is also designed with 26
series resistors
in the B-Port outputs. This design reduces line noise in
applications such as memory address drivers, clock driv-
ers, and bus transceivers/transmitters.
Features
s
1.4V to 3.6V V
CC
supply operation
s
3.6V tolerant inputs and outputs
s
26
series resistors in B-Port outputs
s
t
PD
(A to B)
3.8 ns max for 3.0V to 3.6V V
CC
s
Power-down high impedance inputs and outputs
s
Supports live insertion/withdrawal (Note 1)
s
Static Drive (I
OH
/I
OL
B outputs)
±
12 mA @ 3.0V V
CC
s
Uses patented noise/EMI reduction circuitry
s
Latchup performance exceeds 300 mA
s
ESD performance:
Human body model
>
2000V
Machine model
>
200V
Note 1:
To ensure the high-impedance state during power up or power
down, OE should be tied to V
CC
through a pull-up resistor; the minimum
value of the resistor is determined by the current-sourcing capability of the
driver.
Ordering Code:
Order Number
74VCX162601MTD
Package Number
MTD56
Package Description
56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Pin Descriptions
Pin Names
OEAB, OEBA
LEAB, LEBA
CLKAB, CLKBA
CLKENAB, CLKENBA
A
1
–A
18
B
1
–B
18
Description
Output Enable Inputs (Active LOW)
Latch Enable Inputs
Clock Inputs
Clock Enable Inputs
Side A Inputs or 3-STATE Outputs
Side B Inputs or 3-STATE Outputs
© 2004 Fairchild Semiconductor Corporation
DS500150
www.fairchildsemi.com

74VCX162601MTD相似产品对比

74VCX162601MTD 74VCX162601 74VCX162601_04
描述 Low Voltage 18-Bit Universal Bus Transceivers with 3.6V Tolerant Inputs and Outputs and 26з Series Resistors in the B-Port Outputs Low Voltage 18-Bit Universal Bus Transceivers with 3.6V Tolerant Inputs and Outputs and 26з Series Resistors in the B-Port Outputs Low Voltage 18-Bit Universal Bus Transceivers with 3.6V Tolerant Inputs and Outputs and 26з Series Resistors in the B-Port Outputs

 
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