CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
2.
JA
is measured with the component mounted on an evaluation PC board in free air.
Electrical Specifications
Supplies = +15V, -15V; V
AH
(Logic Level High) = 2.4V, V
AL
(Logic Level Low) = 0.8V;
V
DD
/LLS = GND. (Note 3) Unless Otherwise Specified
TEST
CONDITIONS
TEMP
(
o
C)
-5
MIN
TYP
MAX
UNITS
PARAMETER
DYNAMIC CHARACTERISTICS
Access Time, t
A
25
Full
-
-
10
-
-
-
-
-
55
-
-
-
-
130
-
20
120
140
250
800
-
-
-
-
-
0.02
175
225
-
175
175
-
-
20
-
10
25
10
-
ns
ns
ns
ns
ns
ns
ns
mV
dB
pF
pF
pF
pF
Break-Before-Make Delay, t
OPEN
Enable Delay (ON), t
ON(EN)
Enable Delay (OFF), t
OFF(EN)
Settling Time
To 0.1%
To 0.01%
Charge Injection Error
Off Isolation
Channel Input Capacitance, C
S(OFF)
Channel Output Capacitance,
C
D(OFF)
Digital Input Capacitance, C
A
Input to Output Capacitance,
C
DS(OFF)
DIGITAL INPUT CHARACTERISTICS
Input Low Threshold, V
AL
(TTL)
Input High Threshold, V
AH
(TTL)
Input Low Threshold, V
AL
(CMOS)
Input High Threshold, V
AH
(CMOS)
Input Leakage Current, I
AH
(High)
Note 3
Note 3
Note 3
Note 3
Note 6
Note 7
25
25
25
25
25
25
25
25
25
25
25
Full
Full
Full
Full
Full
-
2.4
-
0.7V
DD
-
-
-
-
-
-
0.8
-
0.3V
DD
-
1
V
V
V
V
A
FN3146 Rev 4.00
April 1, 2005
Page 4 of 8
HI-516
Electrical Specifications
Supplies = +15V, -15V; V
AH
(Logic Level High) = 2.4V, V
AL
(Logic Level Low) = 0.8V;
V
DD
/LLS = GND. (Note 3) Unless Otherwise Specified
(Continued)
TEST
CONDITIONS
TEMP
(
o
C)
Full
-5
MIN
-
TYP
-
MAX
25
UNITS
A
PARAMETER
Input Leakage Current, I
AL
(Low)
ANALOG CHANNEL CHARACTERISTICS
Analog Signal Range, V
IN
On Resistance, r
ON
Note 4
Note 5
Full
25
Full
-15
-
-
-
-
-
-
-
-
620
-
0.01
-
0.03
-
0.04
+15
750
1,000
-
50
-
100
-
V
nA
nA
nA
nA
nA
Off Input Leakage Current, l
S(OFF)
25
Full
Off Output Leakage Current,
I
D(OFF)
On Channel Leakage Current, I
D(ON)
POWER SUPPLY CHARACTERISTICS
Power Dissipation, P
D
I+, Current
I-, Current
NOTES:
V
EN
= 2.4V
25
Full
25
Full
Full
Full
-
-
-
-
-
-
900
30
30
mW
mA
mA
3. V
DD
/LLS pin = open or grounded for TTL compatibility. V
Intersil products are sold by description only. Intersil may modify the circuit design and/or specifications of products at any time without notice, provided that such
modification does not, in Intersil's sole judgment, affect the form, fit or function of the product. Accordingly, the reader is cautioned to verify that datasheets are
current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its
subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see
在全球半导体产业因景气不佳而纷传并购、整合之际，两大IT巨头三星、IBM日前却双双宣布，将强化半导体产业投资。 三星电子本周一宣布，已向韩国证券交易所提交一份申请文件，打算2008年投下10.5亿美元，用于升级内存芯片生产线、改进技术工艺，从而提高产能并降低成本。无独有偶。本周二IBM公司宣布，未来3年将投资10亿美元，用于扩充位于纽约州 East Fishkill 的半导体工厂，以消...[详细]
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
