HI-1573, HI-1574
November 2017
MIL-STD-1553
3.3V Monolithic Dual Transceivers
PIN CONFIGURATIONS
44 N/C
43 BUSA
42 BUSA
41 BUSA
40 BUSA
39 VDDA
38 VDDA
37 TXA
36 TXA
35 N/C
34 N/C
N/C 1
RXENA 2
GNDA 3
GNDA 4
GNDA 5
VDDB 6
VDDB 7
BUSB 8
BUSB 9
BUSB 10
BUSB 11
DESCRIPTION
The HI-1573 and HI-1574 are low power CMOS dual
transceivers designed to meet the requirements of the
MIL-STD-1553 specification.
The transmitter section of each bus takes complementary
CMOS / TTL Manchester II bi-phase data and converts it to
differential voltages suitable for driving the bus isolation
transformer. Separate transmitter inhibit control signals
are provided for each transmitter.
The receiver section of the each bus converts the 1553 bus
bi-phase differential data to complementary CMOS / TTL
data suitable for input to a Manchester decoder. Each
receiver has a separate enable input, which forces the
receiver outputs to logic "0" (HI-1573) or logic “1” (HI-
1574).
To minimize the package size for this function, the
transmitter outputs are internally connected to the receiver
inputs, so that only two pins are required for connection to
each coupling transformer. For designs requiring
independent access to transmitter and receiver 1553
signals, please contact your Holt Sales representative.
1573PCI
1573PCT
1573PCM
1574PCI
1574PCT
1574PCM
N/C 12
N/C 13
N/C 14
N/C 15
RXENB 16
GNDB 17
GNDB 18
GNDB 19
RXB 20
RXB 21
N/C 22
33 N/C
32 N/C
31 TXINHA
30 RXA
29 RXA
28 N/C
27 N/C
26 TXB
25 TXB
24 TXINHB
23 N/C
44 Pin Plastic 7mm x 7mm
Chip-scale package (QFN)
VDDA 1
BUSA 2
BUSA 3
RXENA 4
GNDA 5
VDDB 6
BUSB 7
BUSB 8
RXENB 9
GNDB 10
20
19
18
17
16
15
14
13
12
11
TXA
TXA
TXINHA
RXA
RXA
TXB
TXB
TXINHB
RXB
RXB
1573PSI
1573PST
1573PSM
1574PSI
1574PST
1574PSM
FEATURES
!
Compliant to MIL-STD-1553A and B,
ARINC 708A
!
3.3V single supply operation
!
Smallest footprint available in 7 mm x 7 mm
44- pin plastic chip-scale package (QFN)
20 Pin Plastic ESOIC - WB package
VDDA 1
BUSA 2
BUSA 3
RXENA 4
GNDA 5
VDDB 6
BUSB 7
BUSB 8
RXENB 9
GNDB 10
20 TXA
19 TXA
!
Available in DIP and small outline (ESOIC)
package options
1573CDI
1573CDT
1573CDM
1574CDI
1574CDT
1574CDM
18 TXINHA
17 RXA
16 RXA
15 TXB
14 TXB
13 TXINHB
12 RXB
11 RXB
!
Industrial and extended temperature ranges
!
Industry standard pin configurations
20 Pin Ceramic DIP package
(DS1573 Rev. U)
HOLT INTEGRATED CIRCUITS
www.holtic.com
11/17
HI-1573, HI-1574
PIN DESCRIPTIONS
PIN
(DIP & SOIC)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
SYMBOL
VDDA
BUSA
BUSA
RXENA
GNDA
VDDB
BUSB
BUSB
RXENB
GNDB
RXB
RXB
TXINHB
TXB
TXB
RXA
RXA
TXINHA
TXA
TXA
FUNCTION
power supply
analog
analog
digital input
power supply
power supply
analog
analog
digital input
power supply
digital output
digital output
digital input
digital input
digital input
digital output
digital output
digital input
digital input
digital input
DESCRIPTION
+3.3 volt power for transceiver A
MIL-STD-1533 bus driver A, positive signal
MIL-STD-1553 bus driver A, negative signal
Receiver A enable. If low, forces RXA and RXA low (HI-1573) or High (HI-1574)
Ground for transceiver A
+3.3 volt power for transceiver B
MIL-STD-1533 bus driver B, positive signal
MIL-STD-1553 bus driver B, negative signal
Receiver B enable. If low, forces RXB and RXB low (HI-1573) or High (HI-1574)
Ground for transceiver B
Receiver B output, inverted
Receiver B output, non-inverted
Transmit inhibit, bus B. If high BUSB, BUSB disabled
Transmitter B digital data input, non-inverted
Transmitter B digital data input, inverted
Receiver A output, inverted
Receiver A output, non-inverted
Transmit inhibit, bus A. If high BUSA, BUSA disabled
Transmitter A digital data input, non-inverted
Transmitter A digital data input, inverted
FUNCTIONAL DESCRIPTION
The HI-1573 family of data bus transceivers contains differ-
ential voltage source drivers and differential receivers. They
are intended for applications using a MIL-STD-1553 A/B
data bus. The device produces a trapezoidal output wave-
form during transmission.
TRANSMITTER
Data input to the device’s transmitter section is from the com-
plementary CMOS inputs TXA/B and TXA/B. The transmit-
ter accepts Manchester II bi-phase data and converts it to dif-
ferential voltages on BUSA/B and BUSA/B. The transceiver
outputs are either direct- or transformer-coupled to the MIL-
STD-1553 data bus. Both coupling methods produce a nomi-
nal voltage on the bus of 7.5 volts peak to peak.
The transmitter is automatically inhibited and placed in the
high impedance state when both TXA/B and TXA/B are
driven with the same logic state. A logic “1” applied to the
TXINHA/B input will force the transmitter to the high imped-
ance state, regardless of the state of TXA/B and TXA/B.
RECEIVER
The receiver accepts bi-phase differential data from the MIL-
STD-1553 bus through the same direct- or transformer-
coupled interface as the transmitter.
The receiver’s differential input stage drives a filter and
threshold comparator that produces CMOS data at the
RXA/B and RXA/B output pins. When the MIL-STD-1553
bus is idle and RXENA or RXENB are high, RXA/B will be
logic “0” on HI-1573 and logic “1” on HI-1574.
The receiver outputs are forced to the bus idle state (logic "0”
on HI-1573 or logic “1” on HI-1574) when RXENA or RXENB
is low.
MIL-STD-1553 BUS INTERFACE
A direct-coupled interface (see Figure 2) uses a 1:2.5 ratio
isolation transformer and two 55 ohm isolation resistors
between the transformer and the bus. The primary center-
tap of the isolation transformer must be connected to GND.
In a transformer-coupled interface (see Figure 2), the
transceiver is connected to a 1:1.79 isolation transformer
which in turn is connected to a 1:1.4 coupling transformer.
The transformer-coupled method also requires two coupling
resistors equal to 75% of the bus characteristic impedence
(Zo) between the coupling transformer and the bus.
Figure 3 and Figure 4 show test circuits for measuring
electrical characteristics of both direct- and transformer-
coupled interfaces respectively. (See electrical
characteristics on the following pages).
HOLT INTEGRATED CIRCUITS
2
HI-1573, HI-1574
Each Bus
TRANSMITTER
Data Bus
Isolation
Transformer
Coupler
Network
Direct or
Transformer
BUSA/B
TXA/B
Transmit
Logic
TXA/B
TXINHA/B
RECEIVER
RXA/B
Receive
Logic
RXA/B
RXENA/B
BUSA/B
Slope
Control
Input
Filter
Comparator
Figure 1. Block Diagram
TRANSMIT WAVEFORM - EXAMPLE PATTERN
TXA/B
TXA/B
BUSA/B - BUSA/B
Vin
(Line to Line)
t
DR
t
DR
t
DR
t
DR
RXA/B (HI-1573)
t
RG
t
RG
RXA/B (HI-1573)
RXA/B (HI-1574)
t
RG
t
RG
RXA/B (HI-1574)
HOLT INTEGRATED CIRCUITS
3
HI-1573, HI-1574
ABSOLUTE MAXIMUM RATINGS
Supply voltage (VDD)
Logic input voltage range
Receiver differential voltage
Driver peak output current
Solder Reflow Temperature
Junction Temperature
Storage Temperature
-0.3 V to +5 V
-0.3 V dc to +3.6 V
50 Vp-p
Temperature Range
+1.0 A
260°C
175°C
-65°C to +150°C
Industrial .......................-40°C to +85°C
Extended.......................-55°C to +125°C
NOTE:
Stresses above absolute maximum
ratings or outside recommended operating
conditions may cause permanent damage to the
device. These are stress ratings only. Operation
at the limits is not recommended.
RECOMMENDED OPERATING CONDITIONS
Supply Voltage
VDD....................................... 3.3V... ±5%
DC ELECTRICAL CHARACTERISTICS
VDD = 3.3 V, GND = 0V, T
A
= Operating Temperature Range (unless otherwise specified).
PARAMETER
Operating Voltage
Total Supply Current
SYMBOL
VDD
ICC1
ICC2
ICC3
CONDITION
Not Transmitting
Transmit one bus @
50% duty cycle
Transmit one bus @
100% duty cycle
Not Transmitting
Transmit one bus @
100% duty cycle
Digital inputs
Digital inputs
Digital inputs
Digital inputs
I
OUT
= -1.0mA, Digital outputs
I
OUT
= 1.0mA, Digital outputs
MIN
3.15
TYP
3.30
10
210
420
0.033
0.475
MAX
3.45
17
225
450
0.060
0.55
UNITS
V
mA
mA
mA
W
W
V
DD
Power Dissipation
PD1
PD2
Min. Input Voltage
Max. Input Voltage
Min. Input Current
Max. Input Current
Min. Output Voltage
Max. Output Voltage
RECEIVER
Input resistance
Input capacitance
(HI)
(LO)
(HI)
(LO)
(HI)
(LO)
V
IH
V
IL
I
IH
I
IL
V
OH
V
OL
70%
30%
20
-20
90%
10%
V
DD
µA
µA
V
DD
V
DD
(Measured at Point “A
D
“ in Figure 3 unless otherwise specified)
R
IN
C
IN
CMRR
V
IN
V
ICM
Detect
V
THD
1 Mhz Sine Wave
Measured at Point “A
D
“ in Figure 3
RXA/B, RXA/B pulse width >70 ns
No pulse at RXA/B, RXA/B
1 MHz Sine Wave
Measured at Point “A
T
“ in Figure 4
RXA/B, RXA/B pulse width >70 ns
No pulse at RXA/B, RXA/B
0.86
Differential
-5.0
1.15
Differential (at chip pins)
Differential
40
9
5.0
20
5
Kohm
pF
dB
Vp-p
V-pk
Vp-p
Common mode rejection ratio
Input Level
Input common mode voltage
Threshold Voltage - Direct-coupled
No Detect
Theshold Voltage - Transformer-coupled
Detect
V
THND
V
THD
0.28
Vp-p
Vp-p
No Detect
V
THND
0.20
Vp-p
HOLT INTEGRATED CIRCUITS
4
HI-1573, HI-1574
DC ELECTRICAL CHARACTERISTICS (cont.)
VDD = 3.3 V, GND = 0V, T
A
= Operating Temperature Range (unless otherwise specified).
PARAMETER
TRANSMITTER
Output Voltage
SYMBOL
CONDITION
MIN
TYP
MAX
UNITS
(Measured at Point “A
D
” in Figure 3 unless otherwise specified)
Direct coupled
Transformer coupled
V
OUT
V
OUT
V
ON
Direct coupled
V
DYN
V
DYN
R
OUT
C
OUT
35 ohm load
(Measured at Point “A
D
“ in Figure 3)
70 ohm load
(Measured at Point “A
T
“ in Figure 4)
Differential, inhibited
35 ohm load
(Measured at Point “A
D
“ in Figure 3)
70 ohm load
(Measured at Point “A
T
“ in Figure 4)
Differential, not transmitting
1 MHz sine wave
-90
-250
10
15
6.0
18.0
9.0
27.0
10.0
90
250
Vp-p
Vp-p
mVp-p
mV
mV
Kohm
pF
Output Noise
Output Dynamic Offset Voltage
Transformer coupled
Output resistance
Output Capacitance
AC ELECTRICAL CHARACTERISTICS
VDD = 3.3 V, GND = 0V, T
A
=Operating Temperature Range (unless otherwise specified).
PARAMETER
RECEIVER
Receiver Delay
Receiver gap time
Receiver Enable Delay
TRANSMITTER
Driver Delay
Rise time
Fall Time
Inhibit Delay
SYMBOL
t
DR
t
RG
t
REN
TEST CONDITIONS
From input zero crossing to RXA/B or RXA/B
Spacing between RXA/B and RXA/B pulses
From RXENA/B rising or falling edge to
RXA/B or RXA/B
MIN
TYP
MAX
500
Note 3
UNITS
ns
ns
(Measured at Point “A
T
” in Figure 4)
60
Note 1
430
Note 2
40
ns
(Measured at Point “A
D
” in Figure 3)
t
DT
tr
tf
t
DI-H
t
DI-L
TXA/B, TXA/B to BUSA/B, BUSA/B
35 ohm load
35 ohm load
Inhibited output
Active output
100
100
150
300
300
100
150
ns
ns
ns
ns
ns
Note 1. Measured using a 1 MHz sinusoid, 20 V peak to peak, line to line at point “AT” (Guaranteed but not tested).
Note 2. Measured using a 1 MHz sinusoid, 860 mV peak to peak, line to line at point “AT” (100% tested).
Note 3. Measured using a 1 MHz sinusoid, 860 mV peak to peak, line to line at point “AT”. Measured from input zero crossing point.
MIL-STD-1553
BUS A
(Direct Coupled)
Isolation
Transformer
55W
BUS A
MIL-STD-1553
BUS B
(Transformer Coupled)
MIL-STD-1553
Stub Coupler
52.5W
Transceiver A
55W
1:2.5
Isolation
Transformer
BUS B
BUS A
Transceiver B
BUS B
1:1.79
1:1.4
52.5W
HI-1573 / HI-1574
Figure 2. Bus Connection Example using HI-1573 or HI-1574
HOLT INTEGRATED CIRCUITS
5
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