DATASHEET

CA3140, CA3140A

4.5MHz, BiMOS Operational Amplifier with MOSFET Input/Bipolar Output

The CA3140A and CA3140 are integrated circuit operational

amplifiers that combine the advantages of high voltage

PMOS transistors with high voltage bipolar transistors on a

single monolithic chip.

The CA3140A and CA3140 BiMOS operational amplifiers

feature gate protected MOSFET (PMOS) transistors in the

input circuit to provide very high input impedance, very low

input current, and high speed performance. The CA3140A

and CA3140 operate at supply voltage from 4V to 36V

(either single or dual supply). These operational amplifiers

are internally phase compensated to achieve stable

operation in unity gain follower operation, and additionally,

have access terminal for a supplementary external capacitor

if additional frequency roll-off is desired. Terminals are also

provided for use in applications requiring input offset voltage

nulling. The use of PMOS field effect transistors in the input

stage results in common mode input voltage capability down

to 0.5V below the negative supply terminal, an important

attribute for single supply applications. The output stage

uses bipolar transistors and includes built-in protection

against damage from load terminal short circuiting to either

supply rail or to ground.

The CA3140A and CA3140 are intended for operation at

supply voltages up to 36V (18V).

FN957

Rev.10.00

Jul 11, 2005

Features

• MOSFET Input Stage

- Very High Input Impedance (Z

IN

) -1.5T (Typ)

- Very Low Input Current (I

l

) -10pA (Typ) at

15V

- Wide Common Mode Input Voltage Range (V

lCR

) - Can be

Swung 0.5V Below Negative Supply Voltage Rail

- Output Swing Complements Input Common Mode

Range

• Directly Replaces Industry Type 741 in Most Applications

• Pb-Free Plus Anneal Available (RoHS Compliant)

Applications

• Ground-Referenced Single Supply Amplifiers in

Automobile and Portable Instrumentation

• Sample and Hold Amplifiers

• Long Duration Timers/Multivibrators

(seconds-Minutes-Hours)

• Photocurrent Instrumentation

• Peak Detectors

• Active Filters

• Comparators

• Interface in 5V TTL Systems and Other Low

Supply Voltage Systems

• All Standard Operational Amplifier Applications

• Function Generators

• Tone Controls

• Power Supplies

• Portable Instruments

• Intrusion Alarm Systems

Pinout

CA3140 (PDIP, SOIC)

TOP VIEW

OFFSET

NULL

INV. INPUT

NON-INV.

INPUT

V-

1

2

3

4

8

STROBE

V+

OUTPUT

OFFSET

NULL

-

+

7

6

5

FN957 Rev.10.00

Jul 11, 2005

Page 1 of 24

CA3140, CA3140A

Ordering Information

PART NUMBER

(BRAND)

CA3140AE

CA3140AEZ*

(See Note)

CA3140AM

(3140A)

CA3140AM96

(3140A)

CA3140AMZ

(3140A) (See Note)

CA3140AMZ96

(3140A) (See Note)

CA3140E

CA3140EZ*

(See Note)

CA3140M

(3140)

CA3140M96

(3140)

CA3140MZ

(3140) (See Note)

CA3140MZ96

(3140) (See Note)

TEMP.

RANGE (°C)

-55 to 125

PACKAGE

8 Ld PDIP

(Pb-free)

8 Ld SOIC

PKG.

DWG. #

E8.3

M8.15

8 Ld SOIC Tape and Reel

8 Ld SOIC

(Pb-free)

M8.15

8 Ld SOIC Tape and Reel

(Pb-free)

8 Ld PDIP

(Pb-free)

8 Ld SOIC

E8.3

M8.15

8 Ld SOIC Tape and Reel

8 Ld SOIC

(Pb-free)

M8.15

8 Ld SOIC Tape and Reel

(Pb-free)

*Pb-free PDIPs can be used for through hole wave solder

processing only. They are not intended for use in Reflow solder

processing applications.

NOTE: Intersil Pb-free products employ special Pb-free material

sets; molding compounds/die attach materials and 100% matte tin

plate termination finish, which are RoHS compliant and compatible

with both SnPb and Pb-free soldering operations. Intersil Pb-free

products are MSL classified at Pb-free peak reflow temperatures

that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-

020.

FN957 Rev.10.00

Jul 11, 2005

Page 2 of 24

CA3140, CA3140A

Absolute Maximum Ratings

DC Supply Voltage (Between V+ and V- Terminals) . . . . . . . . . 36V

Differential Mode Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . 8V

DC Input Voltage . . . . . . . . . . . . . . . . . . . . . . (V++8V) To (V- -0.5V)

Input Terminal Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1mA

Output Short Circuit Duration (Note 2) . . . . . . . . . . . . . . Indefinite

Operating Conditions

Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . -55

o

C to 125

o

C

Thermal Information

Thermal Resistance (Typical, Note 1)



JA

(

o

C/W)



JC

(

o

C/W)

PDIP Package* . . . . . . . . . . . . . . . . . .

115

N/A

SOIC Package . . . . . . . . . . . . . . . . . . .

165

N/A

Maximum Junction Temperature (Plastic Package) . . . . . . . 150

o

C

Maximum Storage Temperature Range . . . . . . . . . . -65

o

C to 150

o

C

Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300

o

C

(SOIC - Lead Tips Only)

*Pb-free PDIPs can be used for through hole wave solder process-

ing only. They are not intended for use in Reflow solder processing

applications.

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the

device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

NOTES:

1.



JA

is measured with the component mounted on a low effective thermal conductivity test board in free air. See Tech Brief TB379 for details

2. Short circuit may be applied to ground or to either supply.

Electrical Specifications

PARAMETER

V

SUPPLY

=

15V,

T

A

= 25

o

C

TYPICAL VALUES

SYMBOL

TEST CONDITIONS

Typical Value of Resistor

Between Terminals 4 and 5 or 4 and 1 to

Adjust Max V

IO

R

I

C

I

R

O

e

N

e

N

BW = 140kHz, R

S

= 1M

R

S

= 100

f = 1kHz

f = 10kHz

CA3140

4.7

CA3140A

18

UNITS

k

Input Offset Voltage Adjustment Resistor

Input Resistance

Input Capacitance

Output Resistance

Equivalent Wideband Input Noise Voltage

(See Figure 27)

Equivalent Input Noise Voltage (See Figure 35)

1.5

4

60

48

40

12

40

18

4.5

9

220

1.5

4

60

48

40

12

40

18

4.5

9

220

0.08

10

4.5

1.4

T

pF



V

nV/Hz

mA

MHz

V/s

A

s

%

s

Short Circuit Current to Opposite Supply

I

OM

+

I

OM

-

Source

Sink

Gain-Bandwidth Product, (See Figures 6, 30)

Slew Rate, (See Figure 31)

Sink Current From Terminal 8 To Terminal 4 to

Swing Output Low

Transient Response (See Figure 28)

f

T

SR

t

r

OS

R

L

= 2k

C

L

= 100pF

R

L

= 2k

C

L

= 100pF

Voltage Follower

Rise Time

Overshoot

To 1mV

To 10mV

0.08

10

4.5

1.4

Settling Time at 10V

P-P

, (See Figure 5)

t

S

Electrical Specifications

PARAMETER

Input Offset Voltage

Input Offset Current

Input Current

For Equipment Design, at V

SUPPLY

=

15V,

T

A

= 25

o

C, Unless Otherwise Specified

CA3140

SYMBOL

|V

IO

|

|I

IO

|

I

MIN

-

TYP

5

0.5

10

MAX

15

30

50

MIN

-

CA3140A

TYP

2

0.5

10

MAX

5

20

40

UNITS

mV

pA

FN957 Rev.10.00

Jul 11, 2005

Page 3 of 24

CA3140, CA3140A

Electrical Specifications

PARAMETER

Large Signal Voltage Gain (Note 3)

(See Figures 6, 29)

Common Mode Rejection Ratio

(See Figure 34)

Common Mode Input Voltage Range (See Figure 8)

Power-Supply Rejection Ratio,

V

IO

/V

S

(See Figure 36)

Max Output Voltage (Note 4)

(See Figures 2, 8)

Supply Current (See Figure 32)

Device Dissipation

Input Offset Voltage Temperature Drift

NOTES:

3. At V

O

= 26V

P-P

, +12V, -14V and R

L

= 2k.

4. At R

L

= 2k.

For Equipment Design, at V

SUPPLY

=

15V,

T

A

= 25

o

C, Unless Otherwise Specified

(Continued)

CA3140

SYMBOL

A

OL

MIN

20

86

CMRR

-

70

V

ICR

PSRR

-15

-

76

V

OM

+

V

OM

-

I+

P

D

V

IO

/T

+12

-14

-

TYP

100

32

90

-15.5 to +12.5

100

80

13

-14.4

4

120

8

MAX

-

320

-

11

150

-

6

180

-

MIN

20

86

-

70

-15

-

76

+12

-14

-

CA3140A

TYP

100

32

90

-15.5 to +12.5

100

80

13

-14.4

4

120

6

MAX

-

320

-

12

150

-

6

180

-

UNITS

kV/V

dB

V/V

dB

V

V/V

dB

V

mA

mW

V/

o

C

Electrical Specifications

For Design Guidance At V+ = 5V, V- = 0V, T

A

= 25

o

C

TYPICAL VALUES

PARAMETER

Input Offset Voltage

Input Offset Current

Input Current

Input Resistance

Large Signal Voltage Gain (See Figures 6, 29)

SYMBOL

|V

IO

|

|I

IO

|

I

R

I

A

OL

CA3140

5

0.1

2

1

100

CA3140A

2

0.1

2

1

100

32

90

-0.5

2.6

100

80

3

0.13

10

1

7

3.7

1.6

8

UNITS

mV

pA

T

kV/V

dB

V/V

dB

V

V/V

dB

V

mA

V/s

MHz

mA

mW

Common Mode Rejection Ratio

CMRR

32

90

Common Mode Input Voltage Range (See Figure 8)

V

ICR

-0.5

2.6

Power Supply Rejection Ratio

PSRR

V

IO

/V

S

V

OM

+

V

OM

-

100

80

3

0.13

10

1

7

3.7

1.6

8

Maximum Output Voltage (See Figures 2, 8)

Maximum Output Current:

Source

Sink

I

OM

+

I

OM

-

Slew Rate (See Figure 31)

Gain-Bandwidth Product (See Figure 30)

Supply Current (See Figure 32)

Device Dissipation

SR

f

T

I+

P

D

FN957 Rev.10.00

Jul 11, 2005

Page 4 of 24

CA3140, CA3140A

Electrical Specifications

For Design Guidance At V+ = 5V, V- = 0V, T

A

= 25

o

C

(Continued)

TYPICAL VALUES

PARAMETER

Sink Current from Terminal 8 to Terminal 4 to Swing Output Low

SYMBOL

CA3140

200

CA3140A

200

UNITS

A

Block Diagram

2mA

BIAS CIRCUIT

CURRENT SOURCES

AND REGULATOR

+

3

INPUT

200A

1.6mA

200A

A



10,000

C

1

12pF

5

1

OFFSET

NULL

8

STROBE

4 V-

2A

2mA

4mA

7 V+

-

A



10

A



1

6 OUTPUT

2

FN957 Rev.10.00

Jul 11, 2005

Page 5 of 24

参数名称	属性值
功能数量	1
端子数量	8
最大供电/工作电压	18 V
最大工作温度	125 Cel
最小工作温度	-55 Cel
额定供电电压	15 V
最大负供电电压	-18 V
额定负供电电压	-15 V
额定带宽	4.5 kHz
额定旋转率	9 V/us
最大输入失调电压	5000 mV
加工封装描述	PLASTIC, MS-001-BA, DIP-8
状态	ACTIVE
工艺	BIMOS
包装形状	RECTANGULAR
包装尺寸	IN-LINE
端子形式	THROUGH-HOLE
端子间距	2.54 mm
端子涂层	TIN LEAD
端子位置	DUAL
包装材料	PLASTIC/EPOXY
温度等级	MILITARY
放大器类型	OP-AMP
额定共模抑制比	90 dB

CA3140

CA3140概述

CA3140规格参数

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