Supply DC current at Shutdown (SD) voltage Vsd=2.7V
Shutdown Current @ VSD = 0V
Units
dB
dB
dBm
dBm
dB
dB
dB
mA
uA
Min.
–
–
–
–
–
–
–
–
Typ
17.9
1.0
-5.9
+2.7
-11
-11
-29
6
0.3
Max.
–
–
–
–
–
–
–
Notes:
1. NF is measured at DUT input leads with board loss deembedded.
2. Measurements at 1.575GHz obtained using demo board described in Figures 4.
3. 1.575GHz IIP3 test condition: F
RF1
= 1572.5 MHz, F
RF2
= 1577.5 MHz with input power of -20dBm per tone measured at the worst case side band.
3
Circuit Symbol
L1
L2
L3
L4
C1
C2
C3
R1
R2
Size
0201
0201
0201
0201
0201
0201
0201
0201
0201
Description
22nH Inductor (Murata LQP03TN22NH00)
2.6nH Inductor (Murata LQP03TN2N6B00)
10nH Inductor (Murata LQP03TN10NH00)
39nH Inductor (Murata LQP03TN39NJ00)
0.1uF Capacitor (Murata GRM033R60J104K)
47pF Capacitor (Murata GRM0335C1E470J)
330pF Capacitor (Murata GRM033R71E331K)
10ohm Resistor
8.2Kohm Resistor (For biasing condition as stated in Table 1a/b)
5.6Kohm Resistor (For biasing condition as stated in Table 1c)
Figure 1. Demo Board and application circuit components table
4
Vd
Vsd
R1
(R1 and L1 optional,
see notes [3] below)
C3
(C3 and R2 are optional,
see notes [3, 4] below)
C2
R2 (Rbias)
1
Bias/control
RFin
L3
2
5
RFout
C1
L1
MGA-231T6
6
L2
L4
NU
3
4
NU
[1]
Notes:
1. Pin 4 must be left unconnected
2. L3 and L4 form the input matching network. C2 and L2 form a matching network at the output of the LNA.
3. L1 and R1 isolates the demoboard from external disturbances during measurement. It is not needed in actual application. Likewise, C1 and C3
mitigate the effect of external noise pickup on the Vdd and SD lines respectively. These components are not required in actual operation.
4. Bias control is achieved by either varying the SD voltage with/without R2, or fixing the SD voltage to Vdd and adjusting R2 for the desired current.
R2 = 8.2 kOhm will result in 4mA when Vdd = 2.85V, Vsd = 1.8V or Vdd = 1.8V, Vsd = 2.6V. R2 = 5.6 kOhm will result in 6mA when Vdd = Vsd = 2.7V.
Figure 2. Demo board and application schematic diagram