A3980
Automotive DMOS Microstepping Driver with Translator
Not for New Design
These parts are in production but have been determined to be
NOT FOR NEW DESIGN. This classification indicates that sale of
this device is currently restricted to existing customer applications.
The device should not be purchased for new design applications
because obsolescence in the near future is probable. Samples are no
longer available.
Date of status change: November 17, 2011
Recommended Substitutions:
For existing customer transition, and for new customers or new appli-
cations, refer to the
A3981.
NOTE: For detailed information on purchasing options, contact your
local Allegro field applications engineer or sales representative.
Allegro MicroSystems, Inc. reserves the right to make, from time to time, revisions to the anticipated product life cycle plan
for a product to accommodate changes in production capabilities, alternative product availabilities, or market demand. The
information included herein is believed to be accurate and reliable. However, Allegro MicroSystems, Inc. assumes no respon-
sibility for its use; nor for any infringements of patents or other rights of third parties which may result from its use.
A3980
Automotive DMOS Microstepping Driver with Translator
Features and Benefits
▪
▪
▪
▪
▪
▪
▪
▪
▪
Typical application up to ±1 A, 35 V output rating
Low R
DS(ON)
outputs, 0.67
Ω
source, 0.54
Ω
sink typical
Automatic current decay mode detection/selection
3.0 V to 5.5 V logic supply voltage range
Mixed, fast, and slow current decay modes
Synchronous rectification for low power dissipation
Internal OVLO, UVLO, and thermal shutdown circuitry
Crossover current protection
Short to supply/ground and short/low load current
diagnostics
Description
The A3980 is a complete microstepping motor driver with
built-in translator for easy operation. It is designed to operate
bipolar stepper motors in full-, half-, eighth-, and sixteenth-
step modes, at up to 35 V and ±1 A. The A3980 includes a
fixed off-time current regulator which has the ability to operate
in slow, fast, or mixed decay modes. This results in reduced
audible motor noise, increased step accuracy, and reduced
power dissipation.
The translator is the key to the easy implementation of the
A3980. Simply inputting one pulse on the step input drives
the motor one microstep. There are no phase sequence tables,
high frequency control lines, or complex interfaces to program.
The A3980 interface is an ideal fit for applications where a
complex
μP
is unavailable or overburdened.
Internal synchronous rectification control circuitry is provided
to improve power dissipation during PWM operation.
Internal circuit protection includes: thermal shutdown with
hysteresis, overvoltage lockout (OVLO), undervoltage lockout
(UVLO), and crossover current protection. Special power-up
sequencing is not required. In addition, two diagnostic fault flags
provide indication of shorts or opens on the motor windings.
The A3980 is supplied in a low-profile (1.1 mm) 28L TSSOP
with exposed thermal pad. This device is lead (Pb) free, with
100% matte tin leadframe plating.
Package: 28 pin TSSOP with exposed
thermal pad (suffix LP)
Approximate Size
Typical Application
26184.26H
A3980
Automotive DMOS Microstepping Driver
with Translator
Selection Guide
Part Number
A3980KLPTR-T
Packing
4000 pieces per reel
Absolute Maximum Ratings
Characteristic
Load Supply Voltage
Logic Supply Voltage
Logic Input Voltage
Sense Voltage
Reference Voltage
Operating Ambient Temperature
Maximum Junction Temperature
Storage Temperature
ESD Rating - Human Body Model
ESD Rating - Charged Device Model
Symbol
V
BB
V
DD
V
IN
V
SENSE
V
REF
T
A
T
J
(max)
T
stg
Range K
(t
W
< 30 ns)
500 ms
Notes
Rating
50
7.0
–0.3 to V
DD
+ 0.3
–1.0 to V
DD
+ 1
0.5
0 to V
DD
–40 to 125
150
–55 to 150
Units
V
V
V
V
V
V
°C
°C
°C
kV
kV
AEC-Q100-002, all pins
AEC-Q100-011, all pins
2.0
1.0
Thermal Ratings
Characteristic
Package Thermal Resistance
Symbol
R
θJA
Test Conditions*
Value Units
2-layer PCB with 3.8 in.
2
of copper area each side
32
ºC/W
connected by thermal vias
4-layer PCB based on JEDEC standards
*Additional thermal information available on Allegro Web site.
28
ºC/W
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
2
A3980
Automotive DMOS Microstepping Driver
with Translator
Functional Block Diagram
C
CP
VREG
5V
VDD
V
REF
SENSE 1
CP2
CP1
VCP
Charge
Pump
C
CS
Voltage
Regulator
DAC
VBATT
VBB1
STEP
DIR
MS1
MS2
Translator
OUT1A
OUT1B
RC1
PWM Latch
Blanking
Mixed Decay
Gate
Drive
Control
Logic
DMOS Full Bridge
DMOS Full Bridge
SENSE1
R
T1
C
T1
SR
SLEEP
ENABLE
VBB2
R
S1
OUT2A
OUT2B
PFD
RC2
PWM Latch
Blanking
Mixed Decay
SENSE2
R
T2
C
T2
DAC
OVLO
UVLO
OVERTEMP
SHORT SENSE
OPEN SENSE
VDD
VCP
VBB
OUT1A/1B
OUT2A/2B
SENSE1
SENSE2
R
S2
SENSE 2
V
REF
AGND
REF
FF1
FF2
PGND
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
3
A3980
Automotive DMOS Microstepping Driver
with Translator
ELECTRICAL CHARACTERISTICS
at T
J
= –40°C to +150ºC, V
BB
= 14 V, V
DD
= 3.0 to 5.5 V (unless otherwise noted)
Characteristics
Output Drivers
Load Supply Voltage Range
V
BB
Driving
Operating
Sleep mode
V
OUT
= V
BB
V
OUT
= 0 V
Source driver, I
OUT
= –1 A, T
A
< 25ºC
Sink driver, I
OUT
= 1 A, T
A
< 25ºC
Source driver, I
OUT
= –1 A, T
A
< 125ºC
Sink driver, I
OUT
= 1 A, T
A
< 125ºC
Source diode, I
F
= –1 A
Sink diode, I
F
= 1 A
f
PWM
< 50 kHz
Operating, outputs disabled
Sleep mode
f
PWM
< 50 kHz
Outputs off
Sleep mode
8
7
0
Symbol
Test Conditions
Min.
Typ.
1
Max.
V
OVB
50
35
20
–20
0.86
0.65
1.06
0.83
1.4
1.4
8
6
20
12
10
20
Units
–
< 1.0
< 1.0
0.51
0.45
0.87
0.72
V
Output Leakage Current
2
I
DSS
–
–
–
–
–
–
μA
V
mA
mA
μA
mA
mA
μA
Output-On Resistance
R
DSON
Body Diode Forward Voltage
V
F
I
BB
–
–
–
Motor Supply Current
Logic Supply Current
I
DD
Logic Interface
Logic Supply Voltage Range
Input Low Voltage
Input High Voltage
Input Hysteresis
Input Current
2
Output Low Voltage
Output High Voltage
STEP Pin Low
STEP Pin High
Setup Time for Input Change to STEP
Hold Time for Input Change from STEP
Wake-Up Time from SLEEP
V
DD
V
IL
V
IH
V
IHYS
I
IN
V
OL
V
OH
t
STPL
t
STPH
t
SU
t
H
t
EN
Operating
3.0
5.0
5.5
0.3 V
DD
V
V
V
mV
μA
V
V
μs
μs
ns
ns
ms
–
–
–
–
I
O
= 3 mA
I
O
= –200
μA
–
0.7 V
DD
200
–20
–
–
300
< ±1
–
500
20
0.4
–
2.8
1
1
200
200
–
–
MS1, MS2, DIR
MS1, MS2, DIR
–
–
–
–
–
–
–
–
–
–
–
–
–
–
1
Continued on next page
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
4
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
