Release Date:
July, 2002
ds_pl2303_v14
Revision History
Revision
1.4
1.3
1.2
•
•
•
•
•
•
•
Description
Add Windows CE .NET support feature
Buffer for upstream and downstream data flow –
change from 96 to 256 bytes
For Chip Version H (date code 0206)
Add OS Support in Features Section
Correct default values in Table 5. Device
Configuration Register
Add Suspend Current in DC Characteristics Section
Move Operating Temperature in DC Characteristics
to new section
Date
August 29, 2002
August 01, 2002
July 03, 2002
PL-2303 Product Datasheet
-
2-
Document Revision 1.3
Release Date:
July, 2002
ds_pl2303_v14
PL-2303 USB to Serial RS232 Bridge Controller
Features
Full compliance with the USB Specification v1.1 and USB CDC v1.1
Support the RS232 Serial interface
Support automatic handshake mode
Support Remote wake-up and power management
256 bytes buffer each for upstream and downstream data flow
Support default ROM or external EEPROM for device configuration
On chip USB transceiver
On chip crystal oscillator running at 12M Hz
Supports Windows 98/SE, ME, 2000, XP, Windows CE3.0, CE .NET, Linux, and Mac OS
28 Pins SOIC package
SSOP 28 PACKAGE
(TOP VIEW)
TXD
DTR_N
RTS_N
VDD_232
RXD
RI_N
GND
VDD
DSR_N
DCD_N
CTS_N
SHTD_N
EE_CLK
EE_DATA
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
OSC2
OSC1
PLL_TEST
GND_PLL
VDD_PLL
LD_MODE
TRI_MODE
GND
VDD
RESET
GND_3V3
VDD_3V3
DM
DP
PL-2303 Product Datasheet
-
3-
Document Revision 1.3
Release Date:
July, 2002
ds_pl2303_v14
Overview
The PL-2303 operates as a bridge between one USB port and one standard RS232 Serial port. The two
large on-chip buffers accommodate data flow from two different buses. The USB bulk-type data is adopted
for maximum data transfer. Automatic handshake is supported at the Serial port. With these, a much higher
baud rate can be achieved compared to the legacy UART controller.
This device is also compliant with USB power management and remote wakeup scheme. Only minimum
power is consumed from the host during Suspend. By integrating all the function in a SOIC-28 package, this
chip is suitable for cable embedding. Users just simply hook the cable into PC or hub’s USB port, and then
they can connect to any RS-232 devices.
Pin Description
Table 1. Pins Description
Pin
No.
1
2
3
4
Name
TXD
DTR_N
RTS_N
VDD_232
Type
O
O
O
P
Description
Data output to Serial port
Data Terminal Ready, active low
Request To Send, active low
RS-232 VDD. The RS-232 output signals (Pin 1 ~ Pin 3) are
designed for 5V, 3.3V or 3V operation. VDD_232 should be
connected to the same power level of the RS-232 interface.
(The RS-232 input signals are always 5V~3V tolerant.)
Note: This document version only provides 5V DC characteristic
information. Refer to future revisions for updates.
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
RXD
RI_N
GND
VDD
DSR_N
DCD_N
CTS_N
SHTD_N
EE_CLK
EE_DATA
DP
DM
VDD_3V3
GND_3V3
RESET
VDD
GND
I
I
P
P
I
I
I
O
I/O
I/O
I/O
I/O
P
P
I
P
P
Data input from Serial Bus
Ring Indicator, active low
Ground
Power
Data Set Ready, active low
Data Carrier Detect, active low
Clear To Send, active low
Shut Down RS232 Transceiver
During Reset, this pin is input for simulation purpose. During
normal operation, this pin is Serial ROM clock
Serial ROM data signal
USB DPLUS signal
USB DMINUS signal
3.3V power for USB transceiver
3.3V ground
System Reset
Power
Ground
PL-2303 Product Datasheet
-
5-
Document Revision 1.3
求职招聘
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
