NSTB1005DXV5T1,
NSTB1005DXV5T5
Preferred Devices
Dual Common
Base−Collector Bias
Resistor Transistors
NPN and PNP Silicon Surface Mount
Transistors with Monolithic Bias
Resistor Network
The BRT (Bias Resistor Transistor) contains a single transistor with
a monolithic bias network consisting of two resistors; a series base
resistor and a base−emitter resistor. These digital transistors are
designed to replace a single device and its external resistor bias
network. The BRT eliminates these individual components by
integrating them into a single device. The NSTB1005DXV5T1
contains two complementary BRT devices are housed in the SOT−553
package which is ideal for low power surface mount applications
where board space is at a premium.
•
Simplifies Circuit Design
•
Reduces Board Space
•
Reduces Component Count
•
Available in 8 mm, 7 inch Tape and Reel
•
Lead Free
MAXIMUM RATINGS
(T
A
= 25°C unless otherwise noted, common for Q
1
and Q
2
, − minus sign for Q
1
(PNP) omitted)
Rating
Collector-Base Voltage
Collector-Emitter Voltage
Collector Current
Symbol
V
CBO
V
CEO
I
C
Value
50
50
100
Unit
UC D
Vdc
Vdc
mAdc
1
UC = Specific Device Code
D = Date Code
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3
R1
2
R2
1
Q2
R2
Q1
R1
4
5
5
1
SOT−553
CASE 463B
MARKING DIAGRAM
5
THERMAL CHARACTERISTICS
Characteristic
(One Junction Heated)
Total Device Dissipation
T
A
= 25°C
Derate above 25°C
Thermal Resistance −
Junction-to-Ambient
Characteristic
(Both Junctions Heated)
Total Device Dissipation
T
A
= 25°C
Derate above 25°C
Thermal Resistance −
Junction-to-Ambient
Junction and Storage Temperature
1. FR−4 @ Minimum Pad
Symbol
P
D
357 (Note 1)
2.9 (Note 1)
R
qJA
350 (Note 1)
mW
mW/°C
°C/W
NSTB1005DXV5T5 SOT−553
Symbol
P
D
500 (Note 1)
4.0 (Note 1)
R
qJA
T
J
, T
stg
250 (Note 1)
−55 to +150
mW
mW/°C
°C/W
°C
Preferred
devices are recommended choices for future use
and best overall value.
Max
Unit
ORDERING INFORMATION
Device
Package
Shipping
†
4 mm pitch
4000/Tape & Reel
2 mm pitch
8000/Tape & Reel
NSTB1005DXV5T1 SOT−553
Max
Unit
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
©
Semiconductor Components Industries, LLC, 2004
1
March, 2004 − Rev. 0
Publication Order Number:
NSTB1005DXV5/D
NSTB1005DXV5T1, NSTB1005DXV5T5
ELECTRICAL CHARACTERISTICS
(T
A
= 25°C unless otherwise noted)
Characteristic
Q1 TRANSISTOR: PNP − OFF CHARACTERISTICS
Collector−Base Cutoff Current (V
CB
= 50 V, I
E
= 0)
Collector−Emitter Cutoff Current (V
CE
= 50 V, I
B
= 0)
Emitter−Base Cutoff Current
Collector−Base Breakdown Voltage (I
C
= 10
mA,
I
E
= 0)
Collector−Emitter Breakdown Voltage (I
C
= 2.0 mA, I
B
= 0)
ON CHARACTERISTICS
DC Current Gain
Collector−Emitter Saturation Voltage (I
C
= 10 mA, I
E
= 0.3 mA)
Output Voltage (on) (V
CC
= 5.0 V, V
B
= 3.5 V, R
L
= 1.0 kW)
Output Voltage (off) (V
CC
= 5.0 V, V
B
= 0.5 V, R
L
= 1.0 kW)
Input Resistor
Resistor Ratio
Q2 TRANSISTOR: NPN − OFF CHARACTERISTICS
Collector-Base Cutoff Current (V
CB
= 50 V, I
E
= 0)
Collector-Emitter Cutoff Current (V
CB
= 50 V, I
B
= 0)
Emitter-Base Cutoff Current
ON CHARACTERISTICS
Collector-Base Breakdown Voltage (I
C
= 10
mA,
I
E
= 0)
Collector-Emitter Breakdown Voltage (I
C
= 2.0 mA, I
B
= 0)
DC Current Gain
(V
CE
= 10 V, I
C
= 5.0 mA)
V
(BR)CBO
V
(BR)CEO
h
FE
V
CE(SAT)
V
OL
V
OH
R1
R1/R2
250
PD , POWER DISSIPATION (MILLIWATTS)
200
50
50
80
−
−
4.9
33
0.8
−
−
140
−
−
−
47
1.0
−
−
−
0.25
0.2
−
61
1.2
Vdc
Vdc
Vdc
kW
Vdc
Vdc
(V
EB
= 6.0, I
C
= 5.0 mA)
I
CBO
I
CEO
I
EBO
−
−
−
−
−
−
100
500
0.1
nAdc
nAdc
mAdc
h
FE
V
CE(sat)
V
OL
V
OH
R1
R
1
/R
2
80
−
−
4.9
32.9
0.8
140
−
−
−
47
1.0
−
0.25
0.2
−
61.1
1.2
Vdc
Vdc
Vdc
kW
I
CBO
I
CEO
I
EBO
V
(BR)CBO
V
(BR)CEO
−
−
−
50
50
−
−
−
−
−
100
500
0.1
−
−
nAdc
nAdc
mAdc
Vdc
Vdc
Symbol
Min
Typ
Max
Unit
Collector−Emitter Saturation Voltage (I
C
= 10 mA, I
B
= 0.3 mA)
Output Voltage (on) (V
CC
= 5.0 V, V
B
= 2.5 V, R
L
= 1.0 kW)
Output Voltage (off) (V
CC
= 5.0 V, V
B
= 0.5 V, R
L
= 1.0 kW)
Input Resistor
Resistor Ratio
150
100
50
0
−50
R
qJA
= 833°C/W
0
50
100
T
A
, AMBIENT TEMPERATURE (°C)
150
Figure 1. Derating Curve
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2
NSTB1005DXV5T1, NSTB1005DXV5T5
TYPICAL ELECTRICAL CHARACTERISTICS − PNP TRANSISTOR
VCE(sat) , MAXIMUM COLLECTOR VOLTAGE (VOLTS)
1
I
C
/I
B
= 10
1000
hFE , DC CURRENT GAIN (NORMALIZED)
V
CE
= 10 V
T
A
= −25°C
0.1
75°C
25°C
T
A
= 75°C
100
25°C
−25°C
0.01
0
20
I
C
, COLLECTOR CURRENT (mA)
40
50
10
1
10
I
C
, COLLECTOR CURRENT (mA)
100
Figure 2. V
CE(sat)
versus I
C
Figure 3. DC Current Gain
4
f = 1 MHz
l
E
= 0 V
T
A
= 25°C
100
75°C
25°C
T
A
= −25°C
Cob , CAPACITANCE (pF)
3
IC, COLLECTOR CURRENT (mA)
10
1
2
0.1
1
0.01
0.001
0
1
2
V
O
= 5 V
6
7
3
4
5
V
in
, INPUT VOLTAGE (VOLTS)
8
9
10
0
0
10
20
30
40
V
R
, REVERSE BIAS VOLTAGE (VOLTS)
50
Figure 4. Output Capacitance
Figure 5. Output Current versus Input Voltage
100
V
O
= 0.2 V
V in , INPUT VOLTAGE (VOLTS)
10
T
A
= −25°C
25°C
75°C
1
0.1
0
10
20
30
I
C
, COLLECTOR CURRENT (mA)
40
50
Figure 6. Input Voltage versus Output Current
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3
NSTB1005DXV5T1, NSTB1005DXV5T5
TYPICAL ELECTRICAL CHARACTERISTICS — NPN TRANSISTOR
VCE(sat) , MAXIMUM COLLECTOR VOLTAGE (VOLTS)
10
I
C
/I
B
= 10
1000
V
CE
= 10 V
T
A
= 75°C
25°C
−25°C
1
T
A
= −25°C
0.1
25°C
75°C
hFE, DC CURRENT GAIN
100
0.01
0
20
40
I
C
, COLLECTOR CURRENT (mA)
50
10
1
10
I
C
, COLLECTOR CURRENT (mA)
100
Figure 7. V
CE(sat)
versus I
C
Figure 8. DC Current Gain
1
0.8
Cob , CAPACITANCE (pF)
0.6
0.4
0.2
0
IC, COLLECTOR CURRENT (mA)
f = 1 MHz
I
E
= 0 mA
T
A
= 25°C
100
75°C
10
1
0.1
0.01
25°C
T
A
= −25°C
V
O
= 5 V
0
2
4
6
V
in
, INPUT VOLTAGE (VOLTS)
8
10
0
10
20
30
40
V
R
, REVERSE BIAS VOLTAGE (VOLTS)
50
0.001
Figure 9. Output Capacitance
Figure 10. Output Current versus Input Voltage
100
V
O
= 0.2 V
V in , INPUT VOLTAGE (VOLTS)
T
A
= −25°C
10
25°C
75°C
1
0.1
0
10
20
30
40
50
I
C
, COLLECTOR CURRENT (mA)
Figure 11. Input Voltage versus Output Current
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4
NSTB1005DXV5T1, NSTB1005DXV5T5
PACKAGE DIMENSIONS
SOT−553
XV5 SUFFIX
5−LEAD PACKAGE
CASE 463B−01
ISSUE A
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETERS
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD
FINISH THICKNESS. MINIMUM LEAD THICKNESS
IS THE MINIMUM THICKNESS OF BASE
MATERIAL.
MILLIMETERS
MIN
MAX
1.50
1.70
1.10
1.30
0.50
0.60
0.17
0.27
0.50 BSC
0.08
0.18
0.10
0.30
1.50
1.70
INCHES
MIN
MAX
0.059
0.067
0.043
0.051
0.020
0.024
0.007
0.011
0.020 BSC
0.003
0.007
0.004
0.012
0.059
0.067
A
−X−
C
K
4
5
1
2
3
B
−Y−
S
D
G
5 PL
M
J
X Y
0.08 (0.003)
DIM
A
B
C
D
G
J
K
S
SOLDERING FOOTPRINT*
0.3
0.0118
0.45
0.0177
1.0
0.0394
1.35
0.0531
0.5
0.5
0.0197 0.0197
SCALE 20:1
mm
inches
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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5
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