a
FEATURES
Excellent TCVos Match, 2 V/ C Max
Low Input Offset Voltage, 150 V Max
Low Supply Current, 550 A Max
Single Supply Operation, 5 V to 30 V
Low Input Offset Voltage Drift, 0.75 V/ C
High Open-Loop Gain, 1500 V/mV Min
High PSRR, 3 V/V
Wide Common-Mode Voltage
Range, V– to within 1.5 V of V+
Pin Compatible with 1458, LM158, LM2904
Available in Die Form
Dual Low Power Operational Amplifier,
Single or Dual Supply
OP221
PIN CONNECTIONS
8-Lead SO
(S-Suffix)
+IN A
1
V–
2
+IN B
3
–IN B
4
8
7
6
5
8-Lead
HERMETIC DIP
(Z-Suffix)
–IN A
OUT A
V+
OUT B
OUT A
1
–IN A
2
+IN A
3
V–
4
8
7
6
5
V+
OUT B
–IN B
+IN B
NC = NO CONNECT
NC = NO CONNECT
GENERAL DESCRIPTION
The OP221 is a monolithic dual operational amplifier that can
be used either in single or dual supply operation. The wide
supply voltage range, wide input voltage range, and low supply
current drain of the OP221 make it well-suited for operation
from batteries or unregulated power supplies.
The excellent specifications of the individual amplifiers combined
with the tight matching and temperature tracking between channels
provide high performance in instrumentation amplifier designs.
The individual amplifiers feature very low input offset voltage,
low offset voltage drift, low noise voltage, and low bias current.
They are fully compensated and protected.
Matching between channels is provided on all critical parameters
including input offset voltage, tracking of offset voltage vs. tem-
perature, non-inverting bias currents, and common-mode rejection.
SIMPLIFIED SCHEMATIC
V+
Q11
Q12
Q3
–IN
+IN
Q7
Q1
Q4
Q2
Q9
Q10
Q4
Q27
Q29
Q26
OUTPUT
Q28
Q5
Q6
Q13
NULL
*
Q33
V–
*
ACCESSIBLE IN CHIP FORM ONLY
REV. A
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
www.analog.com
Fax: 781/326-8703
© Analog Devices, Inc., 2002
OP221–SPECIFICATIONS
(Electrical Characteristics at V =
s
.
2.5 V to
Max
150
3
100
15 V, T
A
= 25 C, unless otherwise noted.)
OP221G
Min
Typ
250
1.5
70
0/3.5
–15/13.5
Max
500
7
120
Unit
µV
nA
nA
V
85
dB
90
32
57
800
0.8/4
±
13.5
100
180
µV/V
V/mV
V
OP221A/E
Parameter
Symbol
Conditions
Min
Typ
75
V
CM
= 0
V
CM
= 0
V+ = 5 V, V– = 0 V (Note 2)
V
S
=
±
15 V
V+ = –5 V, V– = 0 V
0 V
≤
V
CM
≤
3.5 V
V
S
=
±
15 V
–15 V
≤
V
CM
≤
13.5 V
V
S
=
±
2.5 V to
±
15 V
V– = 0 V, V+ = 5 V to 30 V
V
S
=
±
15 V, R
L
= 10 kΩ
V
O
=
±
10 V
V+ = 5 V, V– = 0 V
R
L
= 10 kΩ
V
S
= 15 V, R
L
= 10 kΩ
R
L
= 10 kΩ (Note 1)
V
S
=
±
2.5 V, No Load
V
S
=
±
15 V, No Load
1500
0.7/4.1
±
13.8
0.2
03
600
450
600
550
800
0/3.5
–15/13.5
90
95
100
100
3
6
10
18
0.5
55
Input Offset Voltage V
OS
Input Offset Current Ios
Input Bias Current
I
B
Input Voltage Range IVR
Common-Mode
Rejection Ratio
CMRR
75
80
Power Supply
Rejection Ratio
Large-Signal
Voltage Gain
Output Voltage
Swing
Slew Rate
Bandwidth
Supply Current
(Both Amplifiers)
PSRR
Avo
V
O
SR
BW
I
SY
0.2
0.3
600
550
850
650
900
V/µS
kHz
µA
NOTES
1
Sample tested.
2
Guaranteed by CMRR test limits.
–2–
REV. A
OP221
SPECIFICATIONS
.
(Electrical Characteristics at V
S
= 2.5 V to 15 V, –55 C
≤
T
A
+125 C for OP221A,
–25 C
≤
T
A
≤
+85 C for OP221E, –40 C
≤
T
A
≤
+85 C for OP221G, unless otherwise noted.)
OP221A/E
OP221G
Max
1.5
300
5
100
0/3.2
–15/13.2
90
95
6
10
1000
0.8/3.8
±
13.5
500
700
650
900
18
32
600
0.9/3.7
V
13.2
600
950
750
1000
µA
70
75
80
dB
90
85
57
100
180
320
µV/V
V/mV
Min
Typ
2
400
2
80
Max
3
700
10
140
Unit
µV/°C
µV
nA
nA
V
Conditions
Min
Typ
0.75
150
V
CM
= 0
V
CM
= 0
V+ = 5 V, V– = 0 V (Note 2)
V
S
=
±
15 V
V+ = –5 V, V– = 0 V
0 V
≤
V
CM
≤
3.5 V
V
S
=
±
15 V
–15 V
≤
V
CM
≤
13.5 V
V
S
=
±
2.5 V to
±
15 V
V– = 0 V, V+ = 5 V to 30 V
V
S
=
±
15 V, R
L
= 10 kΩ
V
O
=
±
10 V
V+ = 5 V, V– = 0 V
R
L
= 10 kΩ
V
S
= 15 V, R
L
= 10 kΩ
V
S
=
±
2.5 V, No Load
V
S
=
±
15 V, No Load
0/3.2
–15/13.2
85
1
55
Parameter
Average Input
Offset Voltage
Input Offset Voltage
Symbol
TCV
OS
V
OS
I
B
IVR
CMRR
Input Offset Current I
OS
Input Bias Current
Input Voltage Range
Common-Mode
Rejection Ratio
Power Supply
Rejection Ratio
Large-Signal
Voltage Gain
Output Voltage
Swing
Supply Current
(Both Amplifiers)
PSRR
A
VO
V
O
I
SY
NOTES
1
Sample tested.
2
Guaranteed by CMRR test limits.
Matching Characteristics at V
s
=
.
15 V, T
A
= 25 C, unless otherwise noted.
OP221A/E
OP221G
Max
200
80
2
5
4
Min
Typ
250
Max
600
120
10
Unit
µV
nA
nA
Conditions
Min
Typ
50
Parameter
Input Offset
Voltage Match
Symbol
∆V
OS
Average Noninverting
Bias Current
I
B
+
Noninverting Input
Offset Current
Common-Mode
Rejection Ratio
Match (Note 1)
Power Supply
Rejection Ratio
Match (Note 1)
I
OS
+
∆CMRR
V
CM
= –15 V to 13.5 V
92
72
dB
∆PSRR
V
S
=
±
2.5 V to
±
15 V
14
140
µV/V
REV. A
–3–
OP221–SPECIFICATIONS
.
(Matching Characteristics at V
s
= 15 V, –55 C
≤
T
A
≤
+125 C for OP221A,
–25 C
≤
T
A
≤
+85 C for OP221E, –40 C
≤
T
A
≤
+85 C for OP221G, unless otherwise noted.
Grades E and G are sample tested.)
OP221A/E
OP221G
Max
400
100
1
2
7
3
6
Min
Typ
400
Max
800
140
5
12
Unit
µV
nA
µV°C
nA
Parameter
Input Offset
Voltage Match
Symbol
∆V
OS
Conditions
Min
Typ
100
Average Noninverting I
B
+
Bias Current
Input Offset
Voltage Tracking
Noninverting Input
Offset Current
Common-Mode
Rejection Ratio
Match (Note 1)
Power Supply
Rejection Ratio
Match (Note 1)
IC∆V
OS
I
OS
+
V
CM
= 0
V
CM
= 0
3
∆CMRR
V
CM
= –15 V to 13.2 V
87
90
72
80
dB
∆PSRR
26
140
µV/V
NOTES
1
∆CMRR
is 20 log
10
V
CM
/∆CME, where V
CM
is the voltage applied to both noninverting inputs and
∆CME
is the difference in common-mode input-referred error.
2
∆PSRR
is: Input-Referred Differential Error
∆V
S
Wafer Test Limits at V
s
=
.
2.5 V to
15 V, T
A
= 25 C, unless otherwise noted.
Conditions
OP221N
Limit
200
V
CM
= 0
V
CM
= 0
V+ = 5 V, V– = 0 V
V
S
=
±
15 V
V– = 0 V, V+ = 5 V,
0 V
≤
V
CM
≤
3.5 V
V
S
=
±
15 V
–15 V
≤
V
CM
≤
13.5 V
V
S
=
±
2.5 V to
±
15 V
V– = 0 V, V+ = 5 V to 30 V
V
S
=
±
15 V
R
L
= 10 kΩ
V+ = 5 V, V– = 0 V, R
L
= 10 kΩ
V
S
= 15 V, R
L
= 10 kΩ
V
S
=
±
2.5 V, No Load
V
S
=
±
15 V, No Load
3.5
85
0/3.5
–15/13.5
88
dB Min
93
12.5
22.5
1500
0.7/4.1
±
13.8
560
810
V/mV Min
V/mV Max
V Min/Max
V Min
µA
Max
Unit
µV
Max
nA Max
nA Max
V Min/Max
V Min
Parameter
Input Offset Voltage
Input Offset Current
Input Bias Current
Input Voltage Range
Common-Mode
Rejection Ratio
Symbol
V
OS
I
OS
I
B
IVR
CMRR
Power Supply
Rejection Ratio
Large-Signal
Voltage Gain
Output Voltage Swing
Supply Current
(Both Amplifiers)
PSRR
Avo
V
O
I
SY
NOTE
Electrical tests are performed at wafer probe to the limits shown. Due to variations in assembly methods and normal yield loss, yield after packaging is not guaranteed
for standard product dice. Consult factory to negotiate specifications based on dice lot qualification through sample lot assembly and testing.
–4–
REV. A
OP221
ABSOLUTE MAXIMUM RATINGS (Note 1)
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
±
18 V
Differential Input Voltage . . . . . . . . . . 30 V or Supply Voltage
Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . Supply Voltage
Output Short-Circuit Duration . . . . . . . . . . . . . . . . Indefinite
Storage Temperature Range . . . . . . . . . . . . –65°C to +150°C
Operating Temperature Range
OP221A . . . . . . . . . . . . . . . . . . . . . . . . . . . . –55°C to +125°C
OP221E . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –25°C to +85°C
OP221G . . . . . . . . . . . . . . . . . . . . . . . . . . . . –40°C to +85°C
Lead Temperature (Soldering 60 sec) . . . . . . . . . . . . . . 300°C
Junction Temperature (T
J
) . . . . . . . . . . . . . –65°C to +150°C
Package Type
8-Lead Hermetic DIP (Z)
8-Lead Plastic DIP (P)
8-Lead SO (S)
JA
(Note 2)
JC
Unit
°C/W
°C/W
°C/W
148
103
158
16
43
43
NOTES
1
Absolute maximum ratings apply to both DICE and packaged parts, unless
otherwise noted.
2
JA
is specified for worst case mounting conditions, i.e.,
JA
is specified for device
in socket for TO, Cerdip, and PDIP packages; elA is specified for device soldered
to printed circuit board for SO package.
ORDERING INFORMATION
1,2
T
A
= +25 C
V
OS
MAX
( V)
150
150
300
500
500
500
1
Packages
Cerdip
Plastic
8-Lead
8-Lead
OP221AZ
3
OP221 EZ
3
OP221GP
3
OP221GS
Operating
Temperature
Range
MIL
IND
Package
Options
Q-8
XIND
XIND
R-8
Burn-in is available on commercial and industrial temperature range parts in CerDIP, plastic DIP, and
TO-can packages.
For devices processed in total compliance to MIL-STD-883, add/883 after part number. Consult factory
for 883 data sheet.
Not for new design, obsolete April 2002.
2
3
Figure 1. Dice Characteristics
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although
the OP221 features proprietary ESD protection circuitry, permanent damage may occur on devices
subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are
recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
REV. A
–5–
嵌入式系统
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