UTC MJD210
PNP EPITAXIAL PLANAR SILICON TRANSISTOR
PNP SILICON DPAK FOR SURFACE
MOUNT APPLICATIONS
DESCRIPTION
The UTC MJD210 is designed for low voltage,
low-power, high-gain audio amplifier applications.
FEATURE
*Collector-Emitter Sustaining Voltage
V
CEO
(sus) =25V (Min) @ I
C
=10mA
*High DC Current Gain
h
FE
=70 (Min) @ I
C
=500mA
=45 (Min) @ I
C
=2A
=10 (Min) @ I
C
=5A
*Lead Formed for Surface Mount Applications in
Plastic Sleeves (No Suffix)
*Straight Lead Version in Plastic Sleeves (“-1” Suffix)
*Lead Formed Version in 16mm Tape and Reel
(“T4” Suffix)
*Low Collector – Emitter Saturation Voltage
V
CE
(sat) = 0.3V (Max) @ I
C
=500mA
= 0.75V (Max) @ I
C
= 2.0 A
*High Current-Gain-Bandwidth Product
f
T
= 65 MHz (Min) @ I
C
= 100 mA
*Annular Construction for Low Leakage
I
CBO
= 100 nA @ Rated V
CB
1
TO-251
1: BASE
2: COLLECTOR
3: EMITTER
MAXIMUM RATINGS
PARAMETER
Collector-Base Voltage
Collector-Emitter Voltage
Emitter-Base Voltage
Collector Current-Continuous
Peak
Base Current
Total Device Dissipation @ T
C
=25°C
Derate above 25°C
Total Device Dissipation @ T
A
=25°C*
Derate above 25°C
Operating and Storage Junction Temperature Range
SYMBOL
V
CB
V
CEO
V
EB
I
C
I
B
P
D
P
D
T
J,
T
stg
VALUE
40
25
7
5
10
1
12.5
0.1
1.4
0.011
-65 to +150
UNIT
V
V
V
A
A
W
W/°C
W
W/°C
°C
THERMAL CHARACTERISTICS
CHARACTERISTIC
Thermal Resistance, Junction to Case
Junction to Ambient*
SYMBOL
R
θJC
R
θJA
MAX
10
89.3
UNIT
°C/W
°C/W
UTC
UNISONIC TECHNOLOGIES CO., LTD.
1
QW-R213-001,A
UTC MJD210
PNP EPITAXIAL PLANAR SILICON TRANSISTOR
ELECTRICAL CHARACTERISTICS
(Tc=25°C, unless otherwise noted)
PARAMETER
OFF CHARACTERISTICS
Collector-Emitter Sustaining
Voltage (note 1)
Collector Cutoff Current
Emitter Cutoff Current
ON CHARACTERISTICS
DC Current Gain (note 2)
h
FE
I
C
=500mA, V
CE
=1V
I
C
=2A, V
CE
=1V
I
C
=5A, V
CE
=2V
I
C
=500mA, I
B
=50mA
I
C
=2A, I
B
=200mA
I
C
=5A, I
B
=1A
I
C
=5A, I
B
=1A
I
C
=2A, V
CE
=1V
I
C
=100mA, V
CE
=10V,
f
test
= 10MHz
70
45
10
-
-
-
-
-
65
120
-
180
-
0.3
0.75
1.8
2.5
1.6
V
V
CEO
(sus)
I
CBO
I
EBO
I
C
=10mA, I
B
=0
V
CB
=40V, I
E
=0
V
CB
=40V, I
E
=0, T
J
=125°C
V
BE
=7V, Ic=0
25
-
-
-
-
100
100
100
V
nA
nA
nA
SYMBOL
TEST CONDITIONS
MIN
MAX
UNIT
Collector-Emitter Saturation
Voltage (note 2)
Base-Emitter Saturation Voltage
(note 1)
Base-Emitter On Voltage (note 1)
DYNAMIC CHARACTERISTICS
Current-Gain-Bandwidth Product
(note 3)
V
CE
(sat)
V
BE
(sat)
V
BE
(on)
f
T
V
V
MHz
pF
Output Capacitance
Cob
V
CB
=10V, I
E
=0, f=0.1MHz
-
*When surface mounted on minimum pad sizes recommended.
(continued)
NOTE 1: Pulse Test: Pulse Width = 300µs, Duty Cycle
≈
2%.
NOTE 2: Pulse Test: Pulse Width = 300µs, Duty Cycle
≈
2%.
NOTE 3: f
T
=½h
fe
½·f
test
.
UTC
UNISONIC TECHNOLOGIES CO., LTD.
2
QW-R213-001,A
UTC MJD210
PNP EPITAXIAL PLANAR SILICON TRANSISTOR
FIG. 1 POWER DERATING
FIG. 2 SWITCHING TIME TEST CIRCUIT
R
B
and R
C
VARIED TO OBTAIN DESIRED CURRENT
LEVELS D1 MUST BE FAST RECOVERY TYPE, e.g.:
1N5825 USED ABOVE I
B
≈100mA
FOR PNP TEST CIRCUIT
MSD6100 USED BELOW I
B
≈100mA
REVERSE ALL POLARITIES
FIG. 3 TURN-ON TIME
FIG. 4 TURN-OFF TIME
FIG. 5 DC CURRENT GAIN
FIG. 6 “ON” VOLTAGE
UTC
UNISONIC TECHNOLOGIES CO., LTD.
3
QW-R213-001,A
UTC MJD210
PNP EPITAXIAL PLANAR SILICON TRANSISTOR
FIG. 7 TEMPERATURE CURRENT (AMP)
FIG. 8 THERMAL RESPONSE
FIG. 9 ACTIVE REGION SAFE OPERATING AREA
There are two limitations on the power handling
ability of a transistor: average junction temperature and
second breakdown. Safe operating area curves
indicate I
C
-V
CE
limits of the transistor that must be
observed for reliable operation; i.e., the transistor must
not be subjected to greater dissipation than the curves
indicate.
The data of Fig. 9 is based on T
J
(pk)=150°C; Tc is
variable depending on conditions. Second breakdown
pulse limits are valid for duty cycles to 10% provided
T
J
(pk)≤150°C. T
J
(pk) may be calculated from the data
in Figure 8. At high case temperatures, thermal
limitations will reduce the power that can be handled to
values less than the limitations imposed by second
breakdown.
UTC
UNISONIC TECHNOLOGIES CO., LTD.
4
QW-R213-001,A
UTC MJD210
PNP EPITAXIAL PLANAR SILICON TRANSISTOR
FIG. 10 CAPACITANCE
UTC assumes no responsibility for equipment failures that result from using products at values that
exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or
other parameters) listed in products specifications of any and all UTC products described or contained
herein. UTC products are not designed for use in life support appliances, devices or systems where
malfunction of these products can be reasonably expected to result in personal injury. Reproduction in
whole or in part is prohibited without the prior written consent of the copyright owner. The information
presented in this document does not form part of any quotation or contract, is believed to be accurate
and reliable and may be changed without notice.
UTC
UNISONIC TECHNOLOGIES CO., LTD.
5
QW-R213-001,A
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