DA1016.003
31 October, 2000
MAS1016
AM Receiver IC
•
Wide Supply Voltage Range
•
Power Down and Power Up Control
•
Control for AGC On
DESCRIPTION
The MAS1016 AM-Receiver chip is a highly
sensitive, simple to use AM receiver specially
intended to receive time signals in the frequency
range from 40 kHz to 100 kHz. There are only a few
external components needed. The circuit has a
preamplifier, wide range automatic gain control,
demodulator and output comparator built in. The
output signal can be processed directly with an
additional digital circuitry to extract the data from the
received signal.
FEATURES
•
•
•
•
•
Wide Supply Voltage Range
Power Down Control
Only a Few External Components Needed
Highly Sensitive AM Receiver
Control for AGC On
APPLICATIONS
•
Time Signal Receiver designed for MSF (British),
WWVB (USA), JG2AS (Japan) and DCF77
(Germany)
BLOCK DIAGRAM
QO
QI
AON (=AGC on)
RFI
AGC Amplifier
Demodulator
&
Comparator
OUT
Power Supply/Biasing
VDD
VSS
PDN
AGC
DEC
1 (6)
DA1016.003
31 October, 2000
PAD LAYOUT
1788 µm
VSS RFI PDN AON DEC
MAS1016
1786 µm
VDD QO
QI AGC OUT
DIE size = 1.79 x 1.79 mm; PAD size = 100 x 100
µm
Substrate is connected to Vdd.
Note: Coordinates are calculated using Vdd as a centre point
Pad Identification
Power Supply Voltage
Quarz Filter Output
Quarz Filter Input
AGC Capacitor
Receiver Output
Demodulator Capacitor
AGC On Control
Power Down Input
Receiver Input
Power Supply Ground
Name
VDD
QO
QI
AGC
OUT
DEC
AON
PDN
RFI
VSS
X-coordinate
0
µm
306
µm
587
µm
866
µm
1143
µm
1111
µm
868
µm
551
µm
309
µm
16
µm
Y-coordinate
0
µm
19
µm
19
µm
19
µm
19
µm
1436
µm
1436
µm
1436
µm
1436
µm
1415
µm
Note
3
2
1
Notes:
1) Level = VSS means receiver on; VDD = receiver off
2) Level = VSS means AGC hold; VDD = AGC on (working)
- Internal pull-up with current < 1
µA
which is switched off in power down
- During AGC hold the receiver output OUT is hold down to VSS
3) 100% AM results in Level = VSS; 25% AM results in Level = VDD
-
the output is a current source/sink with |I
OUT
| > 5
µA
-
at power down the output is tri-state
2 (6)
DA1016.003
31 October, 2000
ABSOLUTE MAXIMUM RATINGS
Parameter
Supply Voltage
Input Voltage
Power Dissipation
Operating Temperature
Storage Temperature
Symbol
V
DD
-V
SS
V
IN
P
MAX
T
OP
T
ST
Conditions
Min
-0.3
V
SS
-0.3
-20
-40
Max
5.0
V
DD
+0.3
100
70
120
Unit
V
V
mW
o
C
o
C
ELECTRICAL CHARACTERISTICS
Operating Conditions: VDD = 1.4V, Temperature = 25°C
Parameter
Operating Voltage
Current Consumption
Stand-By Current
Input Range
Sensitivity
Input Levels |l
IN
|<0.5
µA
Output Current
V
OL
<0.2 V
DD
;V
OH
>0.8 V
DD
Output Pulse
Startup Time
Output Delay Time
Symbol
V
DD
I
DD
I
DDoff
f
IN
V
IN
V
IL
V
IH
|I
OUT
|
T
0
T
1
T
Start
T
Delay
Conditions
Min
1.10
Typ
50
Max
3.60
200
0.1
100
50
0.2 V
DD
Unit
V
µA
µA
kHz
mVrms
V
µA
40
0.001
0.8 V
DD
5
65
150
8
50
125
220
100
ms
ms
s
ms
3 (6)
DA1016.003
31 October, 2000
TYPICAL APPLICATION
Crystal
*
AON (=AGC on)
QO
Ferrite-
Antenna
RFI
AGC Amplifier
Demodulator
&
Comparator
OUT
QI
Receiver
output
VDD
1.4 V
Power Supply/Biasing
VSS
PDN
AGC
Note 1
0.47…1 uF
47 nF
DEC
Crystal frequencies:
77.503 kHz for DCF77 Receiver,
60 kHz for WWVB (USA) and MSF (British) Receiver
40 kHz JG2AS (Japan) Receiver
Note 1: AGC Capacitor
DCF77 Receiver 0.47 to 1.0 uF
WWVB (USA), MSF (British) and JG2AS (Japan) 220 nF (external control of AON (=AGC on)is needed, for
more details see also DAEV1016)
4 (6)
DA1016.003
31 October, 2000
PACKAGE FOR SAMPLES
PDIP 20
NC
1
20 VSS
19 NC
18 RFI
17 PDN
16 AON
15 DEC
14 NC
13 NC
12 NC
11 NC
VDD 2
NC
QO
NC
QI
3
4
5
6
AGC 7
OUT 8
NC
9
NC 10
PIN DESCRIPTION
Pin Name
NC
VDD
NC
QO
NC
QI
AGC
OUT
NC
NC
NC
NC
NC
NC
DEC
AON
PDN
RFI
NC
VSS
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
Type
P
AO
AI
AO
DO
Function
Positive Power Supply
Quartz Filter Output
Quartz Filter Input
AGC Capacitor
Receiver Output
Note
3
AO
DI
AI
AI
G
Demodulator Capacitor
AGC On Control
Power Down Input
Receiver Input
Power Supply Ground
2
1
Notes:
1) Level = VSS means receiver on; VDD = receiver off
2) Level = VDD means receiver on; VSS = receiver off (PDN = VDD)
Internal pull-down resistor > 1MOhm to VSS
3) 100 % AM results in Level = VSS; 25 % AM results in Level = VDD
- the output is a current source/sink with
[lout]
>5
µA
- at power down the output is tri-state
5 (6)
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