AVAILAB
LE
MG3500/MG2580 HD H.264 CODEC
DATA SHEET
Advance Information
July 23, 2010
Document Release 1.4
Document Number: PN1100
Functional Diagrams
Pin Configurations appear at end of data sheet.
Functional Diagrams continued at end of data sheet.
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at 1-888-629-4642, or visit Maxim’s website at www.maximintegrated.com.
Copyright © 2010 Maxim Integrated Products
This document contains advanced information and is subject to change without prior notice.
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a
Maxim product. Maxim retains the right to make changes to its products or specifications to improve
performance, reliability or manufactur-ability. All information in this document, including descriptions of
features, functions, performance, technical specifications and availability, is subject to change without notice
at any time. While the information furnished herein is held to be accurate and reliable, no responsibility will
be assumed by Maxim for its use. Furthermore, the information contained herein does not convey to the
purchaser of microelectronic devices any license under the patent right of any manufacturer.
Maxim products are not intended for use in life support products where failure of a Maxim product could
reasonably be expected to result in death or personal injury. Anyone using a Maxim product in such an
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All other products or service names used in this publication are for identification purposes only, and may be
trademarks or registered
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are the property of their
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1.0: Description
13
1.1: Hardware Overview
14
1.2: Support Tools
18
2.0: Device Overview, Pin Assignments
21
2.1: Naming Conventions
21
2.2: Pinout Diagrams
22
2.3: Pin Descriptions (by Interface)
27
2.4: Power and Ground Pins
52
2.5: Pin List by Power Group
55
2.6: Hookup Recommendations when Interfaces Are
Unused 57
3.0: Device Configuration
67
3.1: Reset
67
3.2: Boot modes for the MMEs and the ARM
67
3.3: Firmware Loader
68
68
3.4: API Configuration
3.5: Pin Multiplexing, GPIOs, etc.
68
3.6: Debug Mode
68
3.7: JTAG ID Register
68
71
4.0: Device Operating Conditions
4.1: Absolute Maximum Ratings
71
4.2: Recommended Operation Conditions
71
72
4.3: Essential Characteristics
4.4: Power Supply Currents for the Different Power
Domains73
73
4.5: AC Timing
5.0: Block Level Operation
97
5.1: Detailed Block Diagram
97
98
5.2: Reset Logic
5.3: Clocks and PLLs
99
5.4: Video Interfaces
103
111
5.5: Video Scaling
5.6: Audio Interfaces
118
5.7: Host Interfaces
120
5.8: Configuration and Status Register (CSR) Defini-
tion
132
5.9: DMA Engine Register Definition
136
5.10: Bitstream Write Register Definition
144
5.11: Special Registers
145
5.12: Memory Interfaces
152
5.13: Serial Interfaces
167
5.14: USB 2.0 On-the-Go Interface
178
5.15: Ethernet Media Access Controller
184
5.16: High-Speed Bitstreams
188
6.0: System Design and Applications
193
6.1: Power Supply Design and Recommendations 193
6.2: Power Supply Sequencing
193
6.3: Reset timing Diagrams
193
6.4: Oscillator Connections, Values and Formulas 194
7.0: Ordering Information
197
7.1: Product Information
197
7.2: MG3500 Family Reflow Profile
198
8.0: Packaging Information
201
8.1: Package Diagram
201
8.2: Thermal Data
9.0: Marking
202
203
MG3500/MG2580 HD H.264 Codec SoC Data Sheet
Change Log
This section of the data sheet lists the changes that have occurred since the last release. Customers
should be aware that not all releases are public, and therefore they might see gaps in the release
numbering system.
Change Log
Revision Page
0.18
71
195
43
43
46
89
0.19
99
111
145
152
184
190
0.20
120
0.21
Section
4.1
6.4.3
2.3.8
2.3.9
2.3.14
4.5.6
5.3
5.5
5.11
5.12
5.15
5.16.5
Change
The Core power supply current was changed from 1000 mA. typical to 1000 mA. maximum.
A new section was added describing use when only an external clock is used.
Specified the resistance of the external USB Bias Current resistor.
Modified the timing specification for the SD and MMC Interface.
Specified the resistance of the internal pull-up and pull-down resistors
Added a new section showing the bitstream timing.
This entire section was re-written to clarify the clock structure.
The definition of the VOUT register was altered.
The specification for the ChipID register was added.
The SDRAM Requirements for Various Profiles table was updated.
Added note regarding the use of an external switch.
Updated the Bitstream Register section.
Made minor changes throughout the book.
Added timing diagrams showing Master Host Interface (MHIF) access timing.
Valid value for EWait of EM1Config is 1; EM1Cmd register set to 0x00; removal of several reg-
isters, Slave Host Interface; Valid value for EM1 is 0; Corrections to S/PDIF and I2S I/Os; BFi-
fostatus changed to EM1fifostatus.
The heading title and description has been changed.
Figure 1-2, only one independent video output is supported.
The maximum pixel rate that VIP can process corresponds to the video input of resolution
1920x1080i at 30 frames per seconds.
Made editorial changes, added definitions, made updates and corrections to several diagrams
and tables throughout the book.
Throughout
5.7.1
Throughout
1.0
14
15
16
1.1.2
1.1.2
1.1.3
Throughout